74ALVC74D,118 NXP Semiconductors, 74ALVC74D,118 Datasheet - Page 16
![IC DUAL D F-F POS-EDGE 14SOIC](/photos/6/57/65749/14-soic-sot108-1_sml.jpg)
74ALVC74D,118
Manufacturer Part Number
74ALVC74D,118
Description
IC DUAL D F-F POS-EDGE 14SOIC
Manufacturer
NXP Semiconductors
Series
74ALVCr
Type
D-Typer
Datasheet
1.74ALVC74PW118.pdf
(20 pages)
Specifications of 74ALVC74D,118
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Function
Set(Preset) and Reset
Output Type
Differential
Number Of Elements
2
Number Of Bits Per Element
1
Frequency - Clock
275MHz
Delay Time - Propagation
3.7ns
Trigger Type
Positive Edge
Current - Output High, Low
24mA, 24mA
Voltage - Supply
1.65 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Number Of Circuits
2
Logic Family
ALVC
Logic Type
D-Type Edge Triggered Flip-Flop
Polarity
Inverting/Non-Inverting
Input Type
Single-Ended
Propagation Delay Time
2.3 ns at 3.3 V
High Level Output Current
- 24 mA
Supply Voltage (max)
3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Supply Voltage (min)
1.65 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74ALVC74D-T
74ALVC74D-T
935269741118
74ALVC74D-T
935269741118
Philips Semiconductors
Suitability of surface mount IC packages for wave and reflow soldering methods
Notes
1. For more detailed information on the BGA packages refer to the “(LF)BGA Application Note ” (AN01026); order a copy
2. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
3. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder
4. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction.
5. Wave soldering is suitable for LQFP, TQFP and QFP packages with a pitch (e) larger than 0.8 mm; it is definitely not
6. Wave soldering is suitable for SSOP, TSSOP, VSO and VSSOP packages with a pitch (e) equal to or larger than
2003 May 26
BGA, LBGA, LFBGA, SQFP, TFBGA, VFBGA
DHVQFN, HBCC, HBGA, HLQFP, HSQFP, HSOP, HTQFP,
HTSSOP, HVQFN, HVSON, SMS
PLCC
LQFP, QFP, TQFP
SSOP, TSSOP, VSO, VSSOP
Dual D-type flip-flop with set and reset;
positive-edge trigger
from your Philips Semiconductors sales office.
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods” .
cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side,
the solder might be deposited on the heatsink surface.
The package footprint must incorporate solder thieves downstream and at the side corners.
suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
(4)
, SO, SOJ
PACKAGE
(1)
16
not suitable
not suitable
suitable
not recommended
not recommended
WAVE
(3)
SOLDERING METHOD
(4)(5)
(6)
suitable
suitable
suitable
suitable
suitable
Product specification
74ALVC74
REFLOW
(2)