74HC564D,653 NXP Semiconductors, 74HC564D,653 Datasheet

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74HC564D,653

Manufacturer Part Number
74HC564D,653
Description
IC D F-F POS EDGE TRIGGER 20SOIC
Manufacturer
NXP Semiconductors
Series
74HCr
Type
D-Type Busr
Datasheet
1.74HC564D653.pdf (18 pages)

Specifications of 74HC564D,653

Function
Standard
Output Type
Tri-State Inverted
Number Of Elements
1
Number Of Bits Per Element
8
Frequency - Clock
127MHz
Delay Time - Propagation
15ns
Trigger Type
Positive Edge
Current - Output High, Low
7.8mA, 7.8mA
Voltage - Supply
2 V ~ 6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
20-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74HC564D-T
74HC564D-T
933715510653
1. General description
2. Features
The 74HC564 is a high-speed Si-gate CMOS device and is pin compatible with low-power
Schottky TTL (LSTTL). The 74HC564 is specified in compliance with JEDEC
standard no. 7A.
The 74HC564 is a octal D-type flip-flop featuring separate D-type inputs for each flip-flop
and inverting 3-state outputs for bus oriented applications. A clock (CP) and an output
enable (OE) input are common to all flip-flops.
The 8 flip-flops will store the state of their individual D-inputs that meet the set-up and hold
times requirements on the LOW-to-HIGH CP transition. When OE is LOW, the contents of
the 8 flip-flops are available at the outputs. When OE is HIGH, the outputs go to the
high-impedance OFF-state. Operation of the OE input does not affect the state of the
flip-flops.
The 74HC564 is functionally identical to the 74HC574 but has inverting outputs. The
74HC564 is functionally identical to the 74HC534, but has a different pinning.
74HC564
Octal D-type flip-flop; positive-edge trigger; 3-state; inverting
Rev. 03 — 11 November 2004
3-state inverting outputs for bus oriented applications
8-bit positive-edge triggered register
Common 3-state output enable input
Independent register and 3-state buffer operation
Low-power dissipation
Complies with JEDEC standard no. 7A
ESD protection:
Multiple package options
Specified from 40 C to +80 C and from 40 C to +125 C.
HBM EIA/JESD22-A114-B exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V.
Product data sheet

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74HC564D,653 Summary of contents

Page 1

Octal D-type flip-flop; positive-edge trigger; 3-state; inverting Rev. 03 — 11 November 2004 1. General description The 74HC564 is a high-speed Si-gate CMOS device and is pin compatible with low-power Schottky TTL (LSTTL). The 74HC564 is specified in compliance ...

Page 2

Philips Semiconductors 3. Quick reference data Table 1: GND = Symbol PHL PLH f max [ input frequency in MHz ...

Page 3

Philips Semiconductors 5. Functional diagram Fig 1. Functional diagram Fig 2. Logic symbol 9397 750 13814 Product data sheet Octal D-type flip-flop; positive-edge trigger; 3-state; inverting FF1 FF8 7 ...

Page 4

Philips Semiconductors Fig 4. Logic diagram 6. Pinning information 6.1 Pinning Fig 5. Pin configuration 9397 750 13814 Product data sheet Octal D-type flip-flop; positive-edge trigger; 3-state; ...

Page 5

Philips Semiconductors 6.2 Pin description Table 3: Symbol GND Functional description 7.1 Function table Table 4: Operating mode Load ...

Page 6

Philips Semiconductors 8. Limiting values Table 5: In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol GND ...

Page 7

Philips Semiconductors 10. Static characteristics Table 7: Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter amb V HIGH-level input voltage IH V LOW-level input voltage IL V ...

Page 8

Philips Semiconductors Table 7: Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter V LOW-level output voltage OL I input leakage current LI I 3-state OFF-state current OZ I quiescent supply current ...

Page 9

Philips Semiconductors 11. Dynamic characteristics Table 8: Dynamic characteristics GND = ns pF; see Symbol Parameter amb propagation delay CP ...

Page 10

Philips Semiconductors Table 8: Dynamic characteristics GND = ns pF; see Symbol Parameter +85 C amb propagation delay CP ...

Page 11

Philips Semiconductors Table 8: Dynamic characteristics GND = ns pF; see Symbol Parameter +125 C amb propagation delay CP ...

Page 12

Philips Semiconductors 12. Waveforms Fig 6. Waveforms showing the clock (CP) to output (Qn) propagation delays, the clock Fig 7. Waveforms showing the 3-state enable and disable times 9397 750 13814 Product data sheet Octal D-type flip-flop; positive-edge trigger; 3-state; ...

Page 13

Philips Semiconductors Fig 8. Waveforms showing the data set-up and hold times for the data input (Dn) Fig 9. Load circuitry for switching times Table 9: Supply V CC 2.0 V 4.5 V 6.0 V 5.0 V 9397 750 13814 ...

Page 14

Philips Semiconductors 13. Package outline DIP20: plastic dual in-line package; 20 leads (300 mil pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions UNIT max. min. max. ...

Page 15

Philips Semiconductors SO20: plastic small outline package; 20 leads; body width 7 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. ...

Page 16

Philips Semiconductors 14. Revision history Table 10: Revision history Document ID Release date 74HC564_3 20041111 Product data sheet • Modifications: The format of this data sheet has been redesigned to comply with the current presentation and information standard of Philips ...

Page 17

Philips Semiconductors 15. Data sheet status [1] Level Data sheet status Product status I Objective data Development II Preliminary data Qualification III Product data Production [1] Please consult the most recently issued data sheet before initiating or completing a design. ...

Page 18

Philips Semiconductors 19. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . ...

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