sa828 Mitel, sa828 Datasheet - Page 5

• Manufacturer Part Number: sa828
• Description: Three-phase Pwm Waveform Generator
• Manufacturer: Mitel

MICROPROCESSOR BUS TIMING
Intel Mode (Fig. 4 and Table 1)
written from the bus into the SA828 on the rising edge of WR.
RD is not used in this mode because the registers in the SA828
are write only. However, this pin must be connected to RD (or
tied high) to enable the SA828 to select the correct interface
format.
Motorola Mode (Fig. 5 and Table 2)
is written from the bus into the SA828 (only when R/W is low) on
the falling edge of DS (providing CS is low).
CONTROLLING THE SA828
registers via the microprocessor interface. These registers are
the initialisation register and the control register.
motor operation (i.e., prior to the PWM outputs being activated)
and sets up the basic operating parameters associated with the
motor and inverter. This data would not normally be updated
during motor operation.
hence the motor) during operation e.g., stop/start, speed,
forward/reverse etc. and would normally be loaded and changed
only after the initialisation register has been loaded.
format, data to be loaded into either of the 24-bit registers is first
written to three 8-bit temporary registers R0, R1 and R2 before
being transferred to the desired 24-bit register. The data is
accepted (and acted upon) only when transferred to one of the
24-bit registers.
initialisation register or the control register is achieved by a write
instruction to a dummy register. Writing to dummy register R3
results in data transfer from R0, R1 and R2 to the control
register, while writing to dummy register R4 transfers data from
R0, R1 and R2 to the initialisation register. It does not matter
what data is written to the dummy registers R3 and R4 as they
are not real registers. It is merely the write instruction to either
of these registers which is acted upon in order to load the
initialisation and control registers.
Initialisation Register Function
under normal operation, will be defined during the power-up
sequence. These parameters are particular to the drive circuitry
used, and therefore changing these parameters during a PWM
cycle is not recommended. Information in this register should
only be modified while RST is active (i.e. low) so that the PWM
outputs are inhibited (low) during the updating process.
Carrier frequency
high carrier frequencies increase waveform resolution and can
allow ultrasonic operation.
AD
The address is latched by the falling edge of ALE. Data is
The address is latched on the falling edge of the AS line. Data
The SA828 is controlled by loading data into two 24-bit
The initialisation register would normally be loaded before
The control register is used to control the PWM outputs (and
As the MOTEL bus interface is restricted to an 8-bit wide
Transfer of data from the temporary registers to either the
The 24-bit initialisation register contains parameters which,
The parameters set in the initialisation register are as follows:
Low carrier frequencies reduce switching losses whereas
0
0
0
0
1
2
AD
0
0
1
1
0
1
Table 3 SA828 register addressing
AD
0
1
0
1
0
0
Register
R0
R1
R2
R3
R4
Temporary register R0
Temporary register R1
Temporary register R2
Transfers control data
Transfers initialisation data
Comment
Carrier frequency selection
clock frequency and a division ratio n , determined by the 3-bit
CFS word set during initialisation. The values of n are selected
as shown in Table 4.
where k = clock frequency and n = 1, 2, 4, 8, 16 or 32 (as set
by CFS)
Power frequency range selection
limit of the power frequency. The operating power frequency is
controlled by the 12-bit Power Frequency Select (PFS) word in
the control register but may not exceed the value set here.
Power frequency range
within the PWM output waveforms. This would normally be set
to a value to prevent the motor system being operated outside
its design parameters.
Pulse delay time ('underlap')
signals, one for the top switch connected to the positive
inverter DC supply and one for the bottom switch connected to
the negative inverter DC supply. In theory, the states of these
two switches are always complementary. However, due to the
finite and non-equal turn-on and turn- off times of power
devices, it is desirable when changing the state of the output
pair, to provide a short delay time during which both outputs
are off in order to avoid a short circuit through the switching
elements.
Pulse deletion time
width between 0% and 100% of the duty cycle. Therefore, in
theory, pulse widths can become infinitesimally narrow. In
practice this causes problems in the power switches due to
storage effects and therefore a minimum pulse width time is
required. All pulses shorter than the minimum specified are
deleted.
Counter reset
the SA828 to be set to zero, disabling the normal frequency
control and giving a 50% output duty cycle.
Initialisation Register Programming
the three 8-bit temporary registers R0-R2. When all the initialisation
data has been loaded into these registers it is transferred into the
24-bit initialisation register by writing to the dummy register R4.
The carrier frequency is a function of the externally applied
The carrier frequency, f
The power frequency range selected here defines the maximum
This sets the maximum power frequency that can be carried
For each phase of the PWM cycle there are two control
A pure PWM sequence produces pulses which can vary in
This facility allows the internal power frequency counter of
The initialisation register data is loaded in 8-bit segments into
FRS
SELECT WORD
Value of n
CFS word
FREQUENCY
FRS
FRS
2
RANGE
Table 4 Values of clock division ratio n
FRS
2
0
= MSB
= LSB
1
Fig. 6 Temporary register R1
FRS
f
CARR
0
101
X
=
DON’T
CARR
32
CARE
512 x n
, is then given by:
100
X
16
k
CFS
011
SELECT WORD
FREQUENCY
8
CFS
CFS
2
CARRIER
CFS
2
0
010
4
= MSB
= LSB
2
CFS
001
2
SA828
2
000
1
5