si3210 ETC-unknow, si3210 Datasheet
si3210
Manufacturer Part Number
si3210
Description
Proslic Programmable Cmos Slic/codec With Ringing/battery Voltage Generation
Manufacturer
ETC-unknow
Datasheet
1.SI3210.pdf
(122 pages)
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P
W I T H
Features
Applications
Description
The ProSLIC™ is a low-voltage CMOS device that integrates SLIC, codec, and
battery generation functionality into a complete analog telephone interface. The
device is ideal for short loop applications such as terminal adaptors, cable telephony,
and wireless local loop. The ProSLIC is powered with a single 3.3 V or 5 V supply.
The Si3210 generates battery voltages dynamically using a software programmable
dc-dc converter from a 3.3 V to 35 V supply; negative high-voltage supplies are not
needed. All high voltage functions are performed locally with a few low cost discrete
components. The device is available in a 38-pin TSSOP and interfaces directly to
standard SPI and PCM bus digital interfaces.
Functional Block Diagram
Preliminary Rev. 1.11 9/01
FSYNC
SCL K
PCL K
SDO
D RX
DTX
SDI
CS
R O
Performs all BORSCHT Functions
Ideal for Short Loop Applications
(5 REN at 2 kft, 3 REN at 4 kft)
Low Voltage CMOS
Package: 38-Pin TSSOP
Compliant with Relevant LSSGR and
CCITT Specifications
Battery Voltage Generated Dynamically
with On-Chip DC-DC Converter
Controller (Si3210 only)
5 REN Ringing Generator
Programmable AC Impedance
A-Law/ -Law, Linear PCM Companding
On-Hook Transmission
Terminal Adaptors
Cable Telephony
PBX/Key Systems
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
Programmable Frequency, Amplitude,
Waveshape, and Cadence
INT
S LI C™ P
Interface
Interface
Co ntrol
PCM
PLL
R
RESET
I N G I N G
Atte nuation/
Atte nua tion /
G ene rator
Deco de
Si3210/11/12
DTMF
G ain/
G ain/
Filter
Tone
Filter
R O G R A M M A B L E
/ B
A T T E R Y
A/D
D/A
DC-D C Co nverter Co ntrolle r
Copyright © 2001 by Silicon Laboratories
Progra m
Hybrid
(Si3210 o nly)
Programmable Constant Current
Feed (20–41 mA)
Programmable Loop Closure and
Ring Trip Thresholds with Debouncing
Loop or Ground Start Operation and
Polarity Battery Reversal
Continuous Line Voltage and Current
Monitoring
DTMF Decoder
Dual Tone Generator
SPI and PCM Bus Digital Interfaces
with Programmable Interrupt for
Control and Data
3.3 V or 5 V Operation
Multiple Loopback Modes for Testing
Pulse Metering
FSK Caller ID Generation
Wireless Local Loop
Voice Over IP
Integrated Access Devices
S i 3 2 1 0 / S i 3 2 11 / S i 3 2 1 2
Co ntrol
Z
Status
Fe ed
L ine
L ine
S
V
O L TA G E
Low C ost
Discretes
Extern al
CMO S SL IC /C
TIP
RING
G
E N E R A T I O N
Patents pending
SDCH/DIO1
SDCL/DIO2
SRINGDC
SRINGE
STIPDC
FSYNC
RESET
VDDA1
SVBAT
QGND
CAPM
STIPE
CAPP
PCLK
IREF
DRX
DTX
INT
Ordering Information
CS
Pin Assignments
Si3210/11/12
See page 118.
13
14
15
16
17
18
19
1
2
3
4
5
6
7
8
9
10
11
12
O D E C
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
Si3210-DS111
SCLK
SDI
SDO
SDITHRU
DCDRV/DCSW
DCFF/DOUT
TEST
GNDD
VDDD
ITIPN
ITIPP
VDDA2
IRINGP
IRINGN
IGMP
GNDA
IGMN
SRINGAC
STIPAC
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