si3210 ETC-unknow, si3210 Datasheet - Page 32

• Manufacturer Part Number: si3210
• Description: Proslic Programmable Cmos Slic/codec With Ringing/battery Voltage Generation
• Manufacturer: ETC-unknow

Si 3210/ Si3 211/S i32 12
time the 16-bit counter will reset to zero and begin
counting until the inactive timer expires. The cadence
continues until the user clears the O1TAE and O1TIE
control bits. The zero crossing detect feature can be
implemented by setting the OZ1 bit (direct Register 32,
bit 5). This ensures that each oscillator pulse ends
without a dc component. The timing diagram in
Figure 19 is an example of an output cadence using the
zero crossing feature.
One-shot oscillation can be achieved by enabling O1E
and O1TAE. Direct control over the cadence can be
achieved by controlling the O1E bit (direct Register 32,
bit 2) directly if O1TAE and O1TIE are disabled.
32
Oscillator 1 initial phase coefficient
Oscillator 2 initial phase coefficient
Oscillator 1 Frequency Coefficient
Oscillator 2 Frequency Coefficient
Oscillator 1 Amplitude Coefficient
Oscillator 2 Amplitude Coefficient
Oscillator 1 Inactive Timer
Oscillator 2 Inactive Timer
Oscillator 1 Active Timer
Oscillator 2 Active Timer
Oscillator 1 Control
Oscillator 2 Control
Parameter
Parameter
Table 27. Associated Tone Generator Registers
Sets oscillator frequency
Sets oscillator frequency
Sets oscillator amplitude
Sets oscillator amplitude
Description / Range
Description / Range
Status and control
Status and control
Sets initial phase
Sets initial phase
Preliminary Rev. 1.11
0 to 8 sec
0 to 8 sec
0 to 8 sec
0 to 8 sec
registers
registers
Tone Generator 1
Tone Generator 2
The operation of tone generator 2 is identical to that of
tone generator 1 using its respective control registers.
Note: Tone Generator 2 should not be enabled simulta-
Continuous
waveforms may be created using tone generator 1 (not
available on tone generator 2) by setting the REL bit
(direct Register 32, bit 6), which enables reloading of
the OSC1, OSC1X, and OSC1Y registers at the
expiration of the active timer (OAT1).
neously with the ringing oscillator due to resource shar-
ing within the hardware.
OSS1, REL, OZ1,
O1E, O1SO[1:0]
O2E, O2SO[1:0]
O2TAE, O2TIE,
O1TAE, O1TIE,
Register Bits
OSC1X[15:0]
OSC1Y[15:0]
OSC2X[15:0]
OSC2Y[15:0]
OSS2, OZ2,
OSC1[15:0]
OSC2[15:0]
OAT1[15:0]
OAT2[15:0]
OIT1[15:0]
OIT2[15:0]
phase
Register
frequency-shift
Direct Registers 36 & 37
Direct Registers 40 & 41
Direct Register 38 & 39
Direct Register 42 & 43
Indirect Register 13
Indirect Register 14
Indirect Register 15
Indirect Register 16
Indirect Register 17
Indirect Register 18
Direct Register 32
Direct Register 33
Location
Location
keying
(FSK)