st10f273m STMicroelectronics, st10f273m Datasheet - Page 77

• Manufacturer Part Number: st10f273m
• Description: 16-bit Mcu With 512 Kbyte Flash Memory And 36 Kbyte Ram
• Manufacturer: STMicroelectronics

ST10F273M
17
Note:
17.1
17.2
CAN modules
The two integrated CAN modules (CAN1 and CAN2) are identical and handle the
completely autonomous transmission and reception of CAN frames according to the CAN
specification V2.0 part B (active). It is based on the C-CAN specification.
Each on-chip CAN module can receive and transmit standard frames with 11-bit identifiers
as well as extended frames with 29-bit identifiers.
Because of duplication of the CAN controllers, the following adjustments are to be
considered:
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If one or both CAN modules is used, Port 4 cannot be programmed to output all eight
segment address lines. Thus, only four segment address lines can be used, reducing the
external memory space to 5 Mbytes (1 Mbyte per CS line).
Configuration support
It is possible that both CAN controllers are working on the same CAN bus, supporting
together up to 64 message objects. In this configuration, both receive signals and both
transmit signals are linked together when using the same CAN transceiver. This
configuration is especially supported by providing open drain outputs for the CAN1_Txd and
CAN2_TxD signals. The open drain function is controlled with the ODP4 register for port P4:
in this way it is possible to connect together P4.4 with P4.5 (receive lines) and P4.6 with
P4.7 (transmit lines configured to be configured as Open-Drain).
The user may also map internally both CAN modules on the same pins P4.5 and P4.6. In
this way, P4.4 and P4.7 can be used either as general purpose I/O lines, or used for I
interface. This is possible by setting bit CANPAR of the XMISC register. To access this
register it is necessary to set bit XMISCEN of the XPERCON register and bit XPEN of the
SYSCON register.
CAN bus configurations
Depending on the application, CAN bus configuration may be one single bus with a single or
multiple interfaces or a multiple bus with a single or multiple interfaces. The ST10F273M can
support both configurations.
Same internal register addresses of both CAN controllers, but with base addresses
differing in address bit A8; separate chip select for each CAN module. Refer to
Section 4: Memory organization on page
The CAN1 transmit line (CAN1_TxD) is the alternate function of the Port P4.6 pin and
the receive line (CAN1_RxD) is the alternate function of the Port P4.5 pin.
The CAN2 transmit line (CAN2_TxD) is the alternate function of the Port P4.7 pin and
the receive line (CAN2_RxD) is the alternate function of the Port P4.4 pin.
Interrupt request lines of the CAN1 and CAN2 modules are connected to the XBUS
interrupt lines together with other X-Peripherals sharing the four vectors.
The CAN modules must be selected with corresponding CANxEN bit of XPERCON
register before the bit XPEN of SYSCON register is set.
The reset default configuration is: CAN1 enabled, CAN2 disabled.
21.
CAN modules
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