st72321j STMicroelectronics, st72321j Datasheet - Page 163

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st72321j

Manufacturer Part Number
st72321j
Description
8-bit Mcu With Nested Interrupts, Flash, 10-bit Adc, 5 Timers, Spi, Sci, I2c Interface
Manufacturer
STMicroelectronics
Datasheet
12.12 10-BIT ADC CHARACTERISTICS
Subject to general operating conditions for V
Figure 101. R
Figure 103. Typical A/D Converter Application
Notes:
1. Unless otherwise specified, typical data are based on T
lines and are not tested.
2. When V
3. Any added external serial resistor will downgrade the ADC accuracy (especially for resistance greater than 10k ). Data
based on characterization results, not tested in production.
4. C
pacitance (3pF). A high C
5. This graph shows that depending on the input signal variation (f
the use of a larger serial resistor (R
Symbol
V
C
t
f
V
R
C
t
STAB
f
ADC
AREF
ADC
AIN
PARASITIC
ADC
AIN
I
AIN
AIN
L
45
40
35
30
25
20
15
10
5
0
DDA
ADC clock frequency
Analog reference voltage
Conversion voltage range
Input leakage current
for analog input
External input impedance
External capacitor on analog input
Variation freq. of analog input signal
Internal sample and hold capacitor
Stabilization time after ADC enable
Conversion time (Sample+Hold)
- No of sample capacitor loading cycles
- No. of Hold conversion cycles
V
0
AIN
represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the pad ca-
and V
AIN
max. vs f
SSA
R
10
C
pins are not available on the pinout, the ADC refers to V
AIN
PARASITIC
Parameter
PARASITIC
ADC
(pF)
C
30
AIN
AIN)
value will downgrade conversion accuracy. To remedy this, f
with C
2)
3)
.
AINx
2 MHz
1 MHz
AIN
70
=0pF
DD
0.7*V
-40° C T
Other T
f
f
, f
CPU
ADC
4)
CPU
A
=8MHz, SPEED=0
=2MHz
=25° C and V
DD
Conditions
V
, and T
A
DD
A
Figure 102. Recommended C
V
ranges
V
0.6V
V
0.6V
85° C range
AREF
AIN
T
T
1000
100
0.1
10
), C
1
A
V
unless otherwise specified.
DD
AIN
DD
-V
0.01
can be increased for stabilization and to allow
SS
2k
=5V. They are given only as design guide-
I
±1 A
L
V
max
DD
Min
0.4
3.8
SSA
0.1
and V
f
AIN
(KHz)
SS
10-Bit A/D
Conversion
Typ
.
0
7.5
12
11
4
1
5)
1)
ADC
AIN
Cain 10 nF
Cain 22 nF
Cain 47 nF
should be reduced.
102
101
Figure
Figure
V
& R
±250
Max
see
5.5
AREF
±1
10
2
3)4)5)
and
ST72XXX
ST72321J
AIN values.
C
12pF
ADC
163/179
1/f
Unit
MHz
nA
k
pF
Hz
pF
V
ADC
A
s
5)

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