st72324bk STMicroelectronics, st72324bk Datasheet - Page 140

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st72324bk

Manufacturer Part Number
st72324bk
Description
3 V/5 V Range 8-bit Mcu With 4/8 Kbyte Rom, 10-bit Adc, Four Timers And Spi
Manufacturer
STMicroelectronics
Datasheet

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Electrical characteristics
140/167
Figure 81. SPI slave timing diagram with CPHA = 0
1. Measurement points are done at CMOS levels: 0.3V
2. When no communication is on-going the data output line of the SPI (MOSI in master mode, MISO in slave
Figure 82. SPI slave timing diagram with CPHA = 1
1. Measurement points are done at CMOS levels: 0.3V
2. When no communication is on-going the data output line of the SPI (MOSI in master mode, MISO in slave
MISO
MOSI
MISO
MOSI
mode) has its alternate function capability released. In this case, the pin status depends of the I/O port
configuration.
mode) has its alternate function capability released. In this case, the pin status depends of the I/O port
configuration.
SS
SS
CPHA=1
CPOL=0
CPHA=1
CPOL=1
CPHA=0
CPOL=0
CPHA=0
CPOL=1
OUTPUT
INPUT
OUTPUT
INPUT
INPUT
INPUT
note 2
see note 2
see
t
a(SO)
t
su(SS)
HZ
t
a(SO)
t
su(SS)
t
su(SI)
t
t
w(SCKH)
w(SCKL)
t
su(SI)
MSB in
t
t
w(SCKH)
w(SCKL)
MSB in
MSB out
MSB out
t
t
h(SI)
c(SCK)
t
h(SI)
t
c(SCK)
t
v(SO)
t
v(SO)
Bit6 out
DD
DD
Bit6 out
and 0.7V
and 0.7V
Bit1 in
DD.
DD.
(1)
(1)
Bit1 in
t
h(SO)
t
h(SO)
t
t
r(SCK)
f(SCK)
t
t
r(SCK)
f(SCK)
LSB in
LSB in
LSB out
LSB out
ST72323 ST72323L
t
h(SS)
t
h(SS)
t
dis(SO)
t
dis(SO)
note 2
see
note 2
see

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