sm59d03g2c25 SyncMOS Technologies,Inc, sm59d03g2c25 Datasheet - Page 18

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sm59d03g2c25

Manufacturer Part Number
sm59d03g2c25
Description
8-bits Micro-controller 8kb+ Isp Flash & 1kb Ram Embedded
Manufacturer
SyncMOS Technologies,Inc
Datasheet

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Part Number
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Part Number:
sm59d03g2c25PP
Manufacturer:
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Quantity:
20 000
4.4
The stack pointer is a 1-byte register initialized to 07h after reset. This register is incremented
before PUSH and CALL instructions, causing the stack to begin at location 08h.
4.5
The data pointer (DPTR) is 2-bytes wide. The lower part is DPL, and the highest is DPH. It can be
loaded as 2 byte register (MOV DPTR, #data16) or as two registers (ea. MOV DPL, #data8). It is
generally used to access external code or data space (ea. MOVC A, @A+DPTR or MOV A,
@DPTR respectively).
Specifications subject to change without notice contact your sales representatives for the most recent information.
ISSFD-M030
Stack Pointer
Data Pointer
DPL[7:0]: Data pointer Low 0
RS[1:0]: Register bank select, used to select working register bank.
SP[7:0]: The Stack Pointer stores the Scratchpad RAM address where the stack
DPH[7:0]: Data pointer High 0
OV: Overflow flag.
AC: Auxiliary Carry flag for BCD operations.
CY: Carry flag.
F0: General purpose Flag 0 available for user.
F1: General purpose Flag 1 available for user.
Mnemonic: SP
Mnemonic: DPL
Mnemonic: DPH
P: Parity flag, affected by hardware to indicate odd/even number of “one” bits in
7
7
7
the Accumulator, i.e. even parity.
begins. In other words, it always points to the top of the stack.
RS[1:0]
00
01
10
11
6
6
6
Selected
5
5
5
Bank 0
Bank 1
Bank 2
Bank 3
Bank
4
4
4
DPH[7:0]
DPL[7:0]
SP[7:0]
00h – 07h
08h – 0Fh
10h – 17h
18h – 1Fh
Location
18
3
3
3
2
2
2
8KB+ ISP Flash & 1KB RAM embedded
1
1
1
Address: 81h
Address: 82h
Address: 83h
Ver.C SM59D03G2 07/2009
0
0
0
8-Bits Micro-controller
Reset
Reset
Reset
07h
00h
00h
SM59D03G2

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