isl22444 Intersil Corporation, isl22444 Datasheet

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isl22444

Manufacturer Part Number
isl22444
Description
Quad Digitally Controlled Potentiometer Xdcp? , Low Noise, Low Power, Spi? Bus, 256 Taps
Manufacturer
Intersil Corporation
Datasheet

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isl22444WFV20Z
Manufacturer:
Intersil
Quantity:
1 874
Low Noise, Low Power, SPI
The ISL22444 integrates four digitally controlled
potentiometers (DCP), control logic and non-volatile memory
on a monolithic CMOS integrated circuit.
The digitally controlled potentiometers are implemented with
a combination of resistor elements and CMOS switches. The
wipers position is controlled by the user through the SPI
serial interface. Each potentiometer has an associated
volatile Wiper Register (WRi) and a non-volatile Initial Value
Register (IVRi) that can be directly written to and read by the
user. The contents of the WRi control the position of the
wiper. At power-up the device recalls the contents of the
DCP’s IVRi to the corresponding WRi.
The ISL22444 also has 11 General Purpose non-volatile
registers that can be used as storage of lookup table for
multiple wiper position or any other valuable information.
The ISL22444 features a dual supply that is beneficial for
applications requiring a bipolar range for DCP terminals
between V- and V
Each DCP can be used as three-terminal potentiometer or
as two-terminal variable resistor in a wide variety of
applications including control, parameter adjustments, and
signal processing.
Ordering Information
NOTES:
ISL22444TFV20Z
ISL22444TFR20Z
ISL22444UFV20Z
ISL22444UFR20Z
ISL22444WFV20Z
ISL22444WFR20Z
1. Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
2. Add “-TK” suffix for 1,000 Tape and Reel option
PART NUMBER
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are
MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
(Notes 1, 2)
CC
.
22444 TFVZ
22444 TFRZ
22444 UFVZ
22444 UFRZ
22444 WFVZ
22444 WFRZ
PART MARKING
®
1
Data Sheet
®
Bus, 256 Taps
1-888-INTERSIL or 1-888-468-3774
RESISTANCE
OPTION (kΩ)
Quad Digitally Controlled Potentiometer (XDCP™)
100
100
50
50
10
10
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
TEMPERATURE
Features
• Four potentiometers in one package
• 256 resistor taps
• SPI serial interface with write/read capability
• Daisy Chain Configuration
• Shutdown mode
• Non-volatile EEPROM storage of wiper position
• 11 General Purpose non-volatile registers
• High reliability
• Wiper resistance: 70Ω typical @ 1mA
• Standby current <4µA max
• Shutdown current <4µA max
• Dual power supply
• 10kΩ, 50kΩ or 100kΩ total resistance
• Extended industrial temperature range: -40 to +125°C
• 20 Ld TSSOP or 20 Ld QFN
• Pb-free plus anneal product (RoHS compliant)
RANGE (°C)
-40 to +125
-40 to +125
-40 to +125
-40 to +125
-40 to +125
-40 to +125
|
- Endurance: 1,000,000 data changes per bit per register
- Register data retention: 50 years @ T ≤ +55°C
- V
- V- = -2.25V to -5.5V
Intersil (and design) and XDCP are registered trademarks of Intersil Americas Inc.
CC
All other trademarks mentioned are the property of their respective owners.
= 2.25V to 5.5V
May 24, 2007
20 Ld TSSOP
20 Ld QFN
20 Ld TSSOP
20 Ld QFN
20 Ld TSSOP
20 Ld QFN
Copyright Intersil Americas Inc. 2007. All Rights Reserved
PACKAGE
(Pb-free)
L20.5x5
L20.5x5
L20.5x5
M20.173
M20.173
M20.173
ISL22444
PKG. DWG. #
FN6426.0

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isl22444 Summary of contents

Page 1

... DCP’s IVRi to the corresponding WRi. The ISL22444 also has 11 General Purpose non-volatile registers that can be used as storage of lookup table for multiple wiper position or any other valuable information. The ISL22444 features a dual supply that is beneficial for applications requiring a bipolar range for DCP terminals between V- and V . ...

Page 2

... VCC 15 SDI RH1 12 RL1 11 RW1 RH3 RW3 WR3 RL3 RH2 WR2 RW2 RL2 RH1 WR1 RW1 RL1 RH0 RW0 WR0 RL0 ISL22444 (20 LEAD QFN) TOP VIEW RW3 VCC SDI 3 13 SCK SDO 5 11 RH1 ...

Page 3

... RW0 EPAD* * Note: PCB thermal land for QFN EPAD should be connected to V- plane or left floating. For more information refer to http://www.intersil.com/data/tb/TB389.pdf 3 ISL22444 “High” terminal of DCP3 “Low” terminal of DCP3 “Wiper” terminal of DCP3 No connection SPI interface clock input Data Output of the SPI serial interface Device ground pin “ ...

Page 4

... V DCP to DCP matching MATCH (Note 10) TC Ratiometric temperature coefficient V (Note 11, 20) 4 ISL22444 Thermal Information Thermal Resistance (Typical, Note 3) 20 Lead TSSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 +0 Lead QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Maximum Junction Temperature (Plastic Package +150°C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp ...

Page 5

... V- Supply Current (non-volatile V-2 write/read) V- Supply Current (non-volatile write/read Current (standby ISL22444 TEST CONDITIONS Wiper at midpoint (80hex) W option (10k) Wiper at midpoint (80hex) U option (50k) Wiper at midpoint (80hex) T option (100k) W option U, T option W option U, T option W option U, T option Wipers at the same tap position with the ...

Page 6

... Hysteresis SCK, SDI, and CS input buffer hysteresis V SDO output buffer LOW voltage OL R SDO pull-up resistor off-chip pu (Note 19) 6 ISL22444 TEST CONDITIONS V- = -5.5V +5.5V @ +85°C, SPI interface CC in standby state V- = -5.5V +5.5V @ +125°C, SPI interface CC in standby state V- = -2.25V +2.25V @ +85°C, SPI ...

Page 7

... Write sequence of SPI serial interface, to the end of the self-timed internal non-volatile write cycle specified for the highest data rate transfer for the device. Higher value pull-up can be used at lower data rates. pu 20. This parameter is not 100% tested. 7 ISL22444 TEST CONDITIONS R = 2k, Cbus = 30pF 2k, Cbus = 30pF ...

Page 8

... LEAD SCK t SU MSB SDI HIGH IMPEDANCE SDO Output Timing CS SCK t SO MSB SDO ADDR SDI XDCP Timing (for All Load Instructions) CS SCK MSB SDI V W HIGH IMPEDANCE SDO 8 ISL22444 10pF t CYC ... ... ... ... LAG ...

Page 9

... TAP POSITION (DECIMAL) FIGURE 3. DNL vs TAP POSITION IN VOLTAGE DIVIDER MODE FOR 10kΩ (W) 2.0 1.6 1.2 0.8 50k V = 2.25V CC 0 TEMPERATURE (ºC) FIGURE 5. ZS ERROR vs TEMPERATURE 9 ISL22444 2 +125ºC 1.5 1 +25ºC 0.5 -0 -40ºC -1.0 -1.5 -2.0 200 250 FIGURE 2. STANDBY I 0. +25ºC 0.25 -0.25 -0.50 200 250 FIGURE 4. INL vs TAP POSITION IN VOLTAGE DIVIDER ...

Page 10

... FIGURE 9. END TO END R % CHANGE vs TOTAL TEMPERATURE 500 10k 400 300 200 100 116 TAP POSITION (DECIMAL) FIGURE 11. TC FOR RHEOSTAT MODE IN ppm 10 ISL22444 (Continued) 2 +25ºC 1.5 1.0 0.5 -0.5 200 250 FIGURE 8. INL vs TAP POSITION IN RHEOSTAT MODE FOR 200 10k 160 120 80 40 ...

Page 11

... CS LOW enables the ISL22444, placing it in the active power mode. A HIGH to LOW transition required prior to the start of any operation after power up. When CS is HIGH, the ISL22444 is deselected and the SDO pin is at high impedance, and (unless an internal write cycle is underway) the device will be in the standby state. ...

Page 12

... RWi and RLi increases monotonically, while the resistance between RHi and RWi decreases monotonically. While the ISL22444 is being powered up, the WRi is reset to 80h (128 decimal), which locates RWi roughly at the center between RLi and RHi. After the power supply voltage ...

Page 13

... SDO 13 ISL22444 Write Operation A Write operation to the ISL22444 is a two or more bytes operation. First, It requires, the CS transition from HIGH to LOW. Then host must send a valid Instruction Byte followed by one or more Data Bytes to SDI pin. The host terminates the write operation by pulling the CS pin from LOW to HIGH. ...

Page 14

... WRi as the IVRi. Reading from the IVRi will not change the WRi, if its contents are different. Daisy Chain Configuration When application needs more then one ISL22444, it can communicate with all of them without additional CS lines by daisy chaining the DCPs as shown on Figure 18. In Daisy ...

Page 15

... FIGURE 18. DAISY CHAIN CONFIGURATION CS SCK 16 CLKLS SDI SDO 0 SDO 1 SDO 2 FIGURE 19. DAISY CHAIN WRITE SEQUENCE DCP SCK SDI INSTRUCTION SDO 15 ISL22444 N DCP IN A CHAIN DCP1 DCP2 CS CS SCK SCK SDI SDO SDI 16 CLKS ...

Page 16

... SDI RD DCP2 RD DCP1 SDO FIGURE 21. DAISY CHAIN READ SEQUENCE DCP Application Example Figure 22 shows an example of using ISL22444 for gain setting and offset correction in a high side current measurement application. DCP0 applies a programmable offset voltage of 25mV to the FB+ pin of the Instrumentation ± ...

Page 17

... ISL28272 OUT 3 FB FB- V- 150k RH1 RW1 R 5 309, 1% 50k RL1 DCP1 (1/4 ISL22444U) PROGRAMMABLE GAIN 90 TO 110 R 6 1.37k, 1% ISL22444UFV20Z 16 18 Vcc RH0 19 DCP0 RL0 5 20 SCK RW0 6 SDO 13 RH1 15 12 SDI DCP1 RL1 14 11 ...

Page 18

... Quad Flat No-Lead Plastic Package (QFN) Micro Lead Frame Plastic Package (MLFP) 18 ISL22444 L20.5x5 20 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE MILLIMETERS SYMBOL MIN 0. θ - NOTES: 1. Dimensioning and tolerancing conform to ASME Y14.5-1994. ...

Page 19

... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 19 ISL22444 M20.173 M B ...

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