isl8501 Intersil Corporation, isl8501 Datasheet
isl8501
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isl8501 Summary of contents
Page 1
... EN_LDO2) control each LDO output. A single power good signal output indicates loss of regulation on either of the two LDO outputs. Independent overcurrent and thermal fault shutdown monitors are integrated into the LDO section. ISL8501 is available in a small 4mmx4mm Quad Flat No- Lead (QFN) package. Ordering Information PART NUMBER PART TEMP ...
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... VIN_LDO1 VOUT1 C7 10 μ F VIN_LDO2 LDO2 VOUT2 1. μ 5.11k FB_LDO2 R8 2.55k 2 ISL8501 R2 2.21k C4 C5 0.1 μ F 0.033 μ F ISL8501 C12 0.1 μ F FIGURE 1. VIN RANGE FROM 4. 301 100pF VOUT R1 C2 10k 10nF C3 10pF R4 20k VIN C9 10 μ F UNREGULATED PHASE L C10 10μ ...
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... VOUT1 C7 10 μ F VIN_LDO2 LDO2 VOUT2 1. μ 5.11k FB_LDO2 R8 2.55k 3 ISL8501 (Continued) R2 2.21k C4 C5 0.1 μ F 0.033 μ F ISL8501 C12 0.1 μ F FIGURE 2. V RANGE FROM 6V TO 25V 301 100pF VOUT R1 C2 10k 10nF C3 10pF R4 20k VIN C9 10uF L 10μ H ...
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... Functional Block Diagram VCC SOFT-START CONTROL 30μ EN_LDO1 EN_LDO2 VIN LDO VCC PG_PWM PG_LDO GND 4 ISL8501 - VOLTAGE + MONITOR EA 0.6V RAMP REFERENCE GENERATOR FAULT MONITOR THERMAL MONITOR OSCILLATOR o +150 C OC MONITOR PVCC POWER-ON RESET VIN_LDO1 MONITOR VIN_LDO2 REF LDO1 POR CONTROL LOGIC FAULT -15% COMP ...
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... Maximum Duty Cycle ERROR AMPLIFIER Open-Loop Gain Gain Bandwidth Product Slew Rate 5 ISL8501 Thermal Information Thermal Resistance QFN Package (Notes 1, 2 Maximum Junction Temperature (Plastic Package +150°C Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C Junction Temperature Range .-55°C to +150°C Storage Temperature Range . . . . . . . . . . . . . . . . . .-65° ...
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... The dropout voltage is defined as minimum amount VIN must exceed a desired VOUT operating point The input voltage VCC must be higher than VIN_LDO or the LDO will not function. 7. Specifications at -40°C to +85°C are guaranteed by +25°C test with margin limits. 6 ISL8501 SYMBOL TEST CONDITIONS Rising Edge ...
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... VCC Internal 5V linear regulator output provides bias to all the internal control logic. The ISL8501 may be powered directly from a 5V (±10%) supply at this pin. When used supply input, this pin must be externally connected to VIN. The VCC pin must always be decoupled to GND with a ceramic bypass capacitor (minimum 1μ ...
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... OUTPUT LOAD (A) FIGURE 5. EFFICIENCY vs LOAD, V 1.508 1.508 7V 1.507 1.507 12V 1.506 IN 1.506 1.505 0.00 0.25 0.50 0.75 OUTPUT LOAD (A) FIGURE 7. V REGULATION vs LOAD, 500kHz 1.2V OUT 8 ISL8501 Circuit of Figure 12V, VIN_LDO1 = VIN_LDO2 = 450mA 1.8V, I LDO1 LDO2 LDO2 Typical values are +25°C. A 100 3.3V OUT 60 5.0V ...
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... FIGURE 11. V REGULATION vs LOAD, 5V OUT 0.12 0.10 0.08 0.06 0.04 NO LOAD 0.02 0. INPUT VOLTAGE (V) FIGURE 13. INPUT POWER ISL8501 Circuit of Figure 12V, VIN_LDO1 = VIN_LDO2 = 450mA 1.8V, I LDO1 LDO2 LDO2 Typical values are +25°C. (Continued) A 3.320 3.318 3.315 7V IN 3.313 3.310 3.308 3 ...
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... OUTPUT LOAD (mA) FIGURE 17. LDO1 vs LOAD, 500kHz, VIN_LDO1 = 3.3V VOUT1 RIPPLE 20mV/DIV LDO1 RIPPLE 20mV/DIV FIGURE 19. STEADY STATE OPERATION AT NO LOAD, 5µs/DIV 10 ISL8501 Circuit of Figure 12V, VIN_LDO1 = VIN_LDO2 = 450mA 1.8V, I LDO1 LDO2 LDO2 Typical values are +25°C. (Continued) ...
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... FIGURE 21. LOAD TRANSIENT, 200µs/DIV EN 5V/DIV IL 1A/DIV PG_PWM 2V/DIV SS 2V/DIV FIGURE 23. SOFT-START AT FULL LOAD, 500µs/DIV EN 5V/DIV IL 1A/DIV PG_PWM 5V/DIV FIGURE 25. SHUT DOWN CIRCUIT AT FULL LOAD, 100µs/DIV 11 ISL8501 Circuit of Figure 12V, VIN_LDO1 = VIN_LDO2 = 450mA 1.8V 450mA, T LDO1 LDO2 LDO2 Typical values are +25° ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 12 ISL8501 Circuit of Figure 12V, VIN_LDO1 = VIN_LDO2 = V IN ...
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... LDO has exceeded its POR threshold. The EN pin enables the buck controller portion of the ISL8501. When the voltage on the EN pin exceeds the POR rising threshold, the controller initiates the soft-start function for the PWM regulator. If the voltage on the EN pin drops below the POR falling threshold, the buck regulator shuts down ...
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... VOUT1 rise time. This allows the BOOT capacitor adequate time to charge for proper operation. Protection Features The ISL8501 limits current in all on-chip power devices to limit on-chip power dissipation. Overcurrent limits on all three regulators protect internal power devices from excessive thermal damage. Undervoltage protection circuitry on the buck regulator provides a second layer of protection for the internal power device under high current conditions ...
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... LDO outputs do not have undervoltage protection. Thermal Overload Protection Thermal overload protection limits total power dissipation in the ISL8501. There are three sensors on the chip to monitor the junction temperature of the internal LDO, PWM switching power N-Channel MOSFET, and LDO pass transistors. When the junction temperature (T ...
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... Given a sufficiently fast control loop design, the ISL8501 will provide either 0% or 100% duty cycle in response to a load transient. The response time is the time required to slew the inductor current from an initial current value to the transient current level ...
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... ESR 2π The compensation network consists of the error amplifier (internal to the ISL8501) and the impedance networks Z and Z . The goal of the compensation network is to provide FB a closed loop transfer function with the highest 0dB crossing frequency (f ) and adequate phase margin ...
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... There are two sets of critical components in the ISL8501 switching converter. The switching components are the most critical because they switch large amounts of energy, and therefore tend to generate large amounts of noise. Next are the small signal components, which connect to sensitive nodes or supply critical bypass current and signal coupling ...
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... Package Outline Drawing L24.4x4D 24 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 2, 10/06 4.00 PIN 1 INDEX AREA (4X) 0.15 TOP VIEW ( TYP ) ( TYPICAL RECOMMENDED LAND PATTERN 19 ISL8501 4X A 20X 24X ± BOTTOM VIEW ± SIDE VIEW ( 20X 24X 24X 0 ...