isl88550a Intersil Corporation, isl88550a Datasheet - Page 14

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isl88550a

Manufacturer Part Number
isl88550a
Description
Synchronous Step Down Controller With Sourcing And Sinking Ldo Regulator
Manufacturer
Intersil Corporation
Datasheet

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Force PWM Mode (SKIP# = AV
The low-noise forced-PWM mode (SKIP# = AV
the zero-crossing comparator, which controls the low-side
switch ON-time. This forces the low-side gate drive
waveform to constantly be the complement of the high-side
gate-drive waveform, so the inductor current reverses at light
loads while UGATE maintains a duty factor of V
Forced-PWM mode keeps the switching frequency fairly
constant. However, forced-PWM operation comes at a cost
where the no-load V
and 20mA due to the external MOSFETs gate charge and
switching frequency. Forced-PWM mode is most useful for
reducing audio frequency noise, improving load-transient
response, and providing sink current capability for dynamic
output voltage adjustment.
Current Limit Buck Regulator (ILIM)
VALLEY CURRENT LIMIT
The current-limit circuit for the Buck Regulator portion of the
ISL88550A employs a unique “valley” current sensing
algorithm that senses the voltage drop across PHASE and
PGND1 and uses the ON-resistance of the rectifying
MOSFET (Q
as the current sensing element. If the magnitude of the
current sense signal is above the valley current-limit
threshold, the PWM controller is not allowed to initiate a new
cycle (Figure 23). With Valley Current Limit sensing, the
actual peak current is greater than the valley current-limit
threshold by an amount equal to the inductor current ripple.
Therefore, the exact current limit characteristic and
maximum load capability are a function of the current-sense
resistance, inductor value and input voltage. When
combined with the undervoltage protection circuit, this
current-limit method is effective in almost every
circumstance
In forced-PWM mode, the ISL88550A also implements a
negative current limit to prevent excessive reverse inductor
currents when the Buck Regulator output is sinking current.
The negative current-limit threshold is set to approximately
120% of the positive current limit and tracks the positive
current limit when V
200kHz
(t
300kHz
(t
450kHz
(t
600kHz
(t
t
ON
ON
ON
ON
ON
= AV
= OPEN)
= REF)
= GND)
SETTING
DD
)
2
.
in the "Typical Application Circuit" on page 22)
FACTOR (µs)
TYPICAL K
ILIM
DD
5.0
3.3
2.2
1.7
bias current remains between 2mA
is adjusted. The current-limit
14
K-FACTOR
ERROR
(10%)
±12.5
±12.5
±10
±10
DD
)
TABLE 1. APPROXIMATE K-FACTOR ERRORS
MINIMUM V
PERFORMANCE SECTION)
DD
OUT
(h = 1.5, SEE DROPOUT
) disables
/V
IN
.
IN
ISL88550A
3.15
3.47
4.13
5.61
AT V
OUT
= 2.5V
threshold is adjusted with an external resistor-divider at ILIM.
A 2µA to 20µA divider current is recommended for accuracy
and noise immunity.
The current-limit threshold adjustment range is from 25mV to
200mV. In the adjustable mode, the current limit threshold
voltage (from PHASE to PGND1) is precisely 1/10th the
voltage seen at ILIM. The threshold defaults to 50mV when
ILIM is connected to AV
switchover to the 50mV default value is approximately
AV
Carefully observe the PC board layout guidelines to ensure
that noise and DC errors do not corrupt the differential
current-sense signals seen between PHASE and PGND1.
DD
4-Cell Li+
Notebook
4-Cell Li+
Notebook
3-Cell Li+
Notebook
+5V input
- 1V.
APPLICATION
TYPICAL
DD
Use for absolute best efficiency
Considered mainstream by current
standards
Useful in 3-cell systems for lighter loads
Good operating point for compound
buck designs or desktop circuts.
. The logic threshold for
COMMENTS
October 1, 2007
FN6168.2

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