isl97635 Intersil Corporation, isl97635 Datasheet - Page 18

• Manufacturer Part Number: isl97635
• Description: Smbus 8-channel Led Driver
• Manufacturer: Intersil Corporation

Write Byte
The Write Byte protocol is only three bytes long. The first byte
starts with the slave address followed by the “command code,”
which translates to the “register index” being written. The third
byte contains the data byte that must be written into the register
selected by the “command code”. A shaded label is used on
cycles during which the slaved backlight controller “owns” or
“drives” the Data line. All other cycles are driven by the “host
master.”
Read Byte
As shown in the Figure 21, the four byte long Read Byte
protocol starts out with the slave address followed by the
“command code” which translates to the “register index.”
Subsequently, the bus direction turns around with the
re-broadcast of the slave address with bit 0 indicating a read
(“R”) cycle. The fourth byte contains the data being returned
by the backlight controller. That byte value in the data byte
reflects the value of the register being queried at the
“command code” index. Note the bus directions, which are
highlighted by the shaded label that is used on cycles during
which the slaved backlight controller “owns” or “drives” the
Data line. All other cycles are driven by the “host master.”
Slave Device Address
The slave address contains 7 MSB plus one LSB as R/W bit,
but these 8 bits are usually called Slave Aaddress bytes. As
shown in Figure 22, the high nibble of the Slave Address byte is
0x5 or 0101b to denote the “backlight controller class.” Bit 3 in
the lower nibble of the Slave Address byte is 1. Bit 0 is always
the R/W bit, as specified by the SMBus protocol. Note: In this
document, the device address will always be expressed as a
full 8-bit address instead of the shorter 7-bit address typically
used in other backlight controller specifications to avoid
ADDRESS
0x00
0x01
0x02
0x03
0x07
0x08
0x09
PWM
Brightness
Control Register
Device Control
Register
Fault/Status
Register
Identification
Register
DC Brightness
Control Register
Configuration
Register
Output Channel
Register
REGISTER
Reserved
Reserved
Reserved
BRTDC7
PANEL
BIT 7
BRT7
CH7
LED
18
Reserved
Reserved 2_CH_SD 1_CH_SD
Reserved
BRTDC6
MFG3
BIT 6
BRT6
CH6
Reserved
Reserved
BRTDC5
MFG2
BIT 5
BRT5
CH5
TABLE 2A. REGISTER LISTING
Reserved
Reserved
BRTDC4
MFG1
BIT 4
BRT4
CH4
ISL97635
Reserved
Reserved
BL_STAT
BRTDC3
MFG0
BIT 3
BRT3
CH3
confusion. Therefore, if the device is in the write mode where bit
0 is 0, the slave address byte is 0x58 or 01011000b. If the
device is in the read mode where bit 0 is 1, the slave address
byte is 0x59 or 01011001b.
The backlight controller may sense the state of the pins at POR
or during normal operation—the pins will not change state while
the device is in operation.
SMBus Register Definitions
The backlight controller registers are Byte wide and
accessible via the SMBus Read/Write Byte protocols. Their
bit assignments are provided in the following sections with
reserved bits containing a default value of “0”.
OV_CURR THRM_SHDN
PWM_MD
BRTDC2
BRT2
REV2
BIT 2
FSW
CH2
FIGURE 22. SLAVE ADDRESS BYTE DEFINITION
MSB
0
IDENTIFIER
DEVICE
PWM_SEL
BRTDC1
1
BRT1
REV1
VSC1
BIT 1
CH1
0
BRTDC0
BL_CTL
FAULT
REV0
VSC0
BIT 0
BRT0
1
CH0
ADDRESS
1
DEVICE
DEFAULT
VALUE
0xFF
0xC8
0xXF
0xFF
0x00
0x00
0xFF
0
0
December 22, 2008
Read and Write
Read and Write
Read and Write
Read and Write
Read and Write
PROTOCOL
Read Only
Read Only
LSB
SMBUS
R/W
FN6434.2