isl6261a Intersil Corporation, isl6261a Datasheet

no-image

isl6261a

Manufacturer Part Number
isl6261a
Description
Single-phase Core Regulator For Imvp-6 Mobile Cpus
Manufacturer
Intersil Corporation
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
isl6261aCRZ
Manufacturer:
Intersil
Quantity:
800
Part Number:
isl6261aCRZ
Manufacturer:
INTERSIL
Quantity:
20 000
Part Number:
isl6261aCRZ-T
Manufacturer:
INTERSIL/PBF
Quantity:
3 018
Part Number:
isl6261aCRZ-T
Manufacturer:
INTERSIL/PBF
Quantity:
8 000
Part Number:
isl6261aCRZ-T
Manufacturer:
INTERSIL
Quantity:
20 000
Company:
Part Number:
isl6261aCRZ-T
Quantity:
5 798
Part Number:
isl6261aIRZ
Manufacturer:
INTERSIL
Quantity:
20 000
Single-Phase Core Regulator for IMVP-6
Mobile CPUs
The ISL6261A is a single-phase buck regulator
implementing lntel
drivers. lntel
voltage regulation technology effectively reducing power
dissipation in lntel
The heart of the ISL6261A is the patented R
Intersil’s Robust Ripple Regulator modulator. Compared with
the traditional multi-phase buck regulator, the R
Technology™ has faster transient response. This is due to
the R
during a load transient.
The ISL6261A provides three operation modes: the
Continuous Conduction Mode (CCM), the Diode Emulation
Mode (DEM) and the Enhanced Diode Emulation Mode
(EDEM). To boost battery life, the ISL6261A changes its
operation mode based on CPU mode signals DPRSLRVR
and DPRSTP#, and the FDE pin setting, to maximize the
efficiency. In CPU active mode, the ISL6261A commands
the CCM operation. When the CPU enters deeper sleep
mode, the ISL6261A enables the DEM to maximize the
efficiency at light load. Asserting the FDE pin of the
ISL6261A in CPU deeper sleep mode will enable the EDEM
to further decrease the switching frequency at light load and
increase the regulator efficiency.
A 7-bit Digital-to-Analog Converter (DAC) allows dynamic
adjustment of the core output voltage from 0.300V to 1.500V.
The ISL6261A has 0.5% system voltage accuracy over
temperature.
A unity-gain differential amplifier provides remote voltage
sensing at the CPU die. This allows the voltage on the CPU
die to be accurately measured and regulated per lntel
IMVP-6 specification. Current sensing can be implemented
through either lossless inductor DCR sensing or precise
resistor sensing. If DCR sensing is used, an NTC thermistor
network will thermally compensates the gain and the time
constant variations caused by the inductor DCR change.
The ISL6261A provides the power monitor function through
the PMON pin. PMON output is a high-bandwidth analog
voltage signal representing the CPU instantaneous power.
The power monitor function can be used by the system to
optimize the overall power consumption, extending battery
run time.
3
modulator commanding variable switching frequency
®
Mobile Voltage Positioning (IMVP) is a smart
®
®
Pentium processors.
IMVP-6
®
®
protocol, with embedded gate
1
Data Sheet
3
Technology™,
Copyright Intersil Americas Inc. 2006, 2007. All Rights Reserved. R
3
®
1-888-INTERSIL or 1-888-468-3774
®
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Features
• Precision single-phase CORE voltage regulator
• Internal gate driver with 2A driving capability
• Microprocessor voltage identification input
• Multiple current sensing schemes supported
• Thermal monitor
• Power monitor indicating CPU instantaneous power
• User programmable switching frequency
• Differential remote voltage sensing at CPU die
• Overvoltage, undervoltage, and overcurrent protection
• Pb-free (RoHS compliant)
Ordering Information
ISL6261ACRZ
ISL6261ACRZ-T* ISL6261 ACRZ -10 to +100 40 Ld 6x6 QFN
ISL6261AIRZ
ISL6261AIRZ-T* 6261A IRZ
*Please refer to TB347 for details on reel specifications.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100% matte
tin plate termination finish, which are RoHS compliant and compatible
with both SnPb and Pb-free soldering operations. Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
PART NUMBER
December 21, 2007
- 0.5% system accuracy over temperature
- Enhanced load line accuracy
- 7-Bit VID input
- 0.300V to 1.500V in 12.5mV steps
- Support VID change on-the-fly
- Lossless inductor DCR current sensing
- Precision resistive current sensing
(Note)
All other trademarks mentioned are the property of their respective owners.
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
ISL6261 ACRZ -10 to +100 40 Ld 6x6 QFN L40.6x6
6261A IRZ
MARKING
PART
3
Technology™ is a trademark of Intersil Americas Inc.
-40 to +100 40 Ld 6x6 QFN L40.6x6
-40 to +100 40 Ld 6x6 QFN
RANGE
TEMP.
(°C)
ISL6261A
Tape and Reel
Tape and Reel
PACKAGE
(Pb-Free)
FN6354.2
L40.6x6
L40.6x6
DWG. #
PKG.

Related parts for isl6261a

isl6261a Summary of contents

Page 1

... Overvoltage, undervoltage, and overcurrent protection • Pb-free (RoHS compliant) Ordering Information PART NUMBER (Note) ISL6261ACRZ ISL6261ACRZ-T* ISL6261 ACRZ -10 to +100 40 Ld 6x6 QFN ISL6261AIRZ ISL6261AIRZ-T* 6261A IRZ ® *Please refer to TB347 for details on reel specifications. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets ...

Page 2

... Pinout FDE PMON RBIAS VR_TT# NTC SOFT OCSET VW COMP FB 2 ISL6261A ISL6261A (40 LD QFN GND PAD (BOTTOM VID2 29 VID1 28 VID0 27 VCCP 26 LGATE VSSP 25 PHASE 24 23 UGATE 22 BOOT ...

Page 3

... VID Off State CHANNEL FREQUENCY Nominal Channel Frequency Adjustment Range AMPLIFIERS Droop Amplifier Offset 3 ISL6261A Thermal Information Thermal Resistance (Typical, Notes 1, 2) θ QFN Package Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +150°C Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www ...

Page 4

... UGATE Turn-on Propagation Delay ISL6261ACRZ ISL6261AIRZ LGATE Turn-on Propagation Delay ISL6261ACRZ ISL6261AIRZ BOOTSTRAP DIODE Forward Voltage Leakage POWER GOOD and PROTECTION MONITOR PGOOD Low Voltage PGOOD Leakage Current 4 ISL6261A = -40°C to +100°C, unless otherwise specified. (Continued) A SYMBOL TEST CONDITIONS A V0 GBW C = 20pF ...

Page 5

... CLK_EN# Low Output Voltage NOTES: 3. Limits established by characterization and are not production tested. Gate Driver Timing Diagram PWM t PDHU UGATE 1V LGATE ISL6261A = -40°C to +100°C, unless otherwise specified. (Continued) A SYMBOL TEST CONDITIONS tpgd CLK_EN# low to PGOOD high O V rising above setpoint > 1ms rising above setpoint > ...

Page 6

... VW COMP FB FDE Forced diode emulation enable signal. Logic high of FDE with logic low of DPRSTP# forces the ISL6261A to operate in diode emulation mode with an increased VW-COMP voltage window. PMON Analog voltage output pin. The voltage potential on this pin indicates the power delivered to the output. ...

Page 7

... VSSP The return path of the lower gate driver. LGATE The lower-side MOSFET gate signal. 7 ISL6261A VC24CP 5V power supply for the gate driver. VID0, VID1, VID2, VID3, VID4, VID5, VID6 VID input with VID0 as the least significant bit (LSB) and VID6 as the most significant bit (MSB). ...

Page 8

... Function Block Diagram FIGURE 1. SIMPLIFIED FUNCTIONAL BLOCK DIAGRAM OF ISL6261A 8 ISL6261A FN6354.2 December 21, 2007 ...

Page 9

... Simplified Application Circuit for DCR Current Sensing VR_TT# VID<0:6> DPRSTP# DPRSLPVR PMON CLK_ENABLE# VR_ON IMVP6_PWRGD VCC-SENSE VSS-SENSE C 3 FIGURE 2. ISL6261A-BASED IMVP-6® SOLUTION WITH INDUCTOR DCR CURRENT SENSING 9 ISL6261A 3V3 VDD VCCP R 5 RBIAS VIN R 6 NTC C 5 UGATE ...

Page 10

... Simplified Application Circuit for Resistive Current Sensing VR_TT# VID<0:6> DPRSTP# DPRSLPVR PMON CLK_ENABLE# VR_ON IMVP6_PWRGD VCC-SENSE VSS-SENSE FIGURE 3. ISL6261A-BASED IMVP-6® SOLUTION WITH RESISTIVE CURRENT SENSING 10 ISL6261A +3 3V3 VDD VCCP R 5 RBIAS VIN R 6 NTC ...

Page 11

... If the SOFT capacitor is 20nF, the SOFT ramp will be 2mV/µs for a soft-start time of 600µs. Once VO is within 20mV of the boot voltage the ISL6261A will count 13 clock cycles, then pull CLK_EN# low, and charge/discharge the SOFT cap with approximately 200µA, therefore VO slews at 10mV/µ ...

Page 12

... ISL6261A TABLE 1. VID TABLE FROM INTEL IMVP-6 SPECIFICATION VID6 VID0 V ( 1.5000 1.4875 1.4750 1.4625 1.4500 1.4375 ...

Page 13

... TABLE 2. ISL6261A OPERATING CONFIGURATIONS FDE DPRSLPVR (Continued) VID5 VID4 VID3 VID2 VID1 VID0 ...

Page 14

... FET current flows from source to drain, it turns synchronous FET to reduce the conduction loss. When the current reverses its direction, trying to flow from drain to source, the ISL6261A turns off the low-side FET to prevent the output capacitor from discharging through the inductor, therefore eliminating the extra conduction loss ...

Page 15

... Toggling of VR_ON or bringing VDD below 4V will reset the fault latch. A way-overvoltage (WOV) fault is declared immediately when the output voltage exceeds 1.7V. The ISL6261A will latch PGOOD low and turn on the low-side FETs. The low-side FETs will remain on until the output voltage drops below approximately 0.85V, then all the FETs are turned off ...

Page 16

... The VSEN and RTN pins of the ISL6261A are connected to Kelvin sense leads at the die of the processor through the processor socket. (The signal names are Vcc_sense and Vss_sense respectively) ...

Page 17

... Resistor Figure 2), connected between the VW fset 7 and COMP pins of the ISL6261A, sets the synthetic ripple window voltage, and therefore sets the switching frequency. This relationship between the resistance and the switching frequency in CCM is approximately given by Equation μ ...

Page 18

... − = − kΩ NTC 1 μ ISL6261A Once and the actual NTC (EQ 273 T actual the o is +25°C. For most One example of using Equations 10, 11 and 12 to design a thermal throttling circuit with the temperature hysteresis +100° ...

Page 19

... FIGURE 9. EQUIVALENT MODEL FOR DROOP CIRCUIT USING DCR SENSING Static Mode of Operation - Static Droop Using DCR Sensing The ISL6261A has an internal differential amplifier to accurately regulate the voltage at the processor die. For DCR sensing, the process to compensate the DCR resistance variation takes several iterative steps. Figure 2 shows the DCR sensing method ...

Page 20

... If C correctly, its voltage will be distorted from the actual waveform of the inductor current and worsen the transient 20 ISL6261A response. Figure 11 shows the transient response when C and too small. V drp2 application to create a system failure ...

Page 21

... Caution needs to be used in choosing the input resistor to the FB pin. Excessively high resistance will cause an error to the output voltage regulation due to the bias current flowing 21 ISL6261A = 7.68kΩ, and in the FB pin recommended to keep this resistor below s 3k. ...

Page 22

... ISL6261A FIGURE 13. AN EXAMPLE OF ISL6261A COMPENSATION SPREADSHEET 22 FN6354.2 December 21, 2007 ...

Page 23

... OC Internal to ISL6261A 1 FIGURE 14. EQUIVALENT MODEL FOR DROOP CIRCUIT USING DISCRETE RESISTOR SENSING Typical Performance (ISL6261 Data, Taken on ISL6261A Eval1 Rev.A Evaluation Board) FIGURE 15. CCM EFFICIENCY, VID = 1.1V 8V 12.6V AND V IN1 IN2 FIGURE 17. DEM EFFICIENCY, VID = 0.7625V 8V 12.6V AND V IN1 IN2 23 ISL6261A ...

Page 24

... Typical Performance (ISL6261 Data, Taken on ISL6261A Eval1 Rev.A Evaluation Board) (Continued) FIGURE 19. ENHANCED DEM EFFICIENCY, VID = 0.7625V 8V 12.6V AND V IN1 IN2 FIGURE 21. ENHANCED DEM EFFICIENCY, VID = 1.1V 8V 12.6V AND V IN1 IN2 5V/div 0.5V/div 1V/div 10V/div FIGURE 23. SOFT-START 19V 0A, VID = 1.5V, IN Ch1: VR_ON, Ch2: V ...

Page 25

... Typical Performance (ISL6261 Data, Taken on ISL6261A Eval1 Rev.A Evaluation Board) (Continued) 5V/div 0.1V/div 1V/div 10V/div FIGURE 25 VID 19V 2A, VID = 1.5V, BOOT IN Ch1: CLK_EN#, Ch2 Ch3: PMON, O Ch4: PHASE 5V/div 0.5V/div 7.68ms 5V/div 10V/div FIGURE 27. CLK_EN AND PGOOD ASSERTION DELAY 19V 2A, VID = 1.1V, Ch1: CLK_EN#, ...

Page 26

... Typical Performance (ISL6261 Data, Taken on ISL6261A Eval1 Rev.A Evaluation Board) (Continued) FIGURE 31. C4 ENTRY/EXIT 12.6V 0.7A, IN HFM/LFM/C4 VID = 1.05V/0.8375V/0.7625V, FDE = DPRSLPVR, Ch1: PMON, Ch2: V Ch3: 40k/100pF FILTERED PMON, Ch4: PHASE FIGURE 33. LOAD TRANSIENT RESPONSE IN CCM V = 12.6V 20A (100A/µs), VID = 1.1V, ...

Page 27

... Typical Performance (ISL6261 Data, Taken on ISL6261A Eval1 Rev.A Evaluation Board) (Continued) 100A/us FIGURE 37. LOAD TRANSIENT RESPONSE IN EDEM 20A, VID = 1.1V, IN Ch1: Io, Ch2 Ch3: PMON, Ch4: PHASE O 120us FIGURE 39. OVERCURRENT PROTECTION 28A, VID = 1.1V, Ch1: DROOP-VO (2.1mV = 1A), Ch2 Ch3: PGOOD, O Ch4: PHASE All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’ ...

Page 28

... ISL6261A Eval1 Evaluation Board Schematics Controller S1 J8 +3.3V DPRSLPVR PSI R108 4 ON PMON/PGD_IN DNP DPRSTP# SD05H0SK FDE +3.3V PGOOD +3.3V 2N7002 6.34K SOFT C3 VCC_PRM OCSET DNP R19 464K 150PF VCCSENSE C12 ...

Page 29

... ISL6261A Eval1 Evaluation Board Schematics Power Stage VIN IRF7821 IRF7821 UGATE R48 C1 BOOT IN 0 0.22UF PHASE IN IRF7832 IRF7832 LGATE (Continued) 1 OUT 0.45UH 1 J20 4 2 R52 DNP VCCSENSE 1 J21 VSSSENSE IN VCORE GND_POWER R60 BUS WIRE R54 DNP ...

Page 30

... ISL6261A Eval1 Evaluation Board Schematics Socket B26 VCCA G21 VCCSENSE VCCP AF7 J6 VCCSENSE VCCP OUT J21 VCCP A7 K6 VCC VCCP IN A9 K21 VCC VCCP A10 M6 VCC VCCP A12 M21 VCORE VCC VCCP A13 N6 VCC VCCP A15 N21 VCC VCCP A17 R6 VCC ...

Page 31

... ISL6261A Eval1 Evaluation Board Schematics Dynamic Load GND_POWER +12V U5 C80 1 VDD 1UF HIP2100 +12V +12V R72 2N7002 499 1 Q14 (Continued VSS 6 LI R74 5 HI 249 R73 249 OFF VCORE HUF76129D3S 3 1 Q15 1 1 BAV99 ...

Page 32

... ISL6261A Eval1 Evaluation Board Schematics Geyserville Transition Gen MST7_SPST 10 GND HC540 ...

Page 33

... Package Outline Drawing L40.6x6 40 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 3, 10/06 6.00 6 PIN 1 INDEX AREA (4X) 0.15 TOP VIEW ( TYP ) ( TYPICAL RECOMMENDED LAND PATTERN 33 ISL6261A 4X 4.5 36X 0. 40X ± BOTTOM VIEW ± SIDE VIEW ( 36X ...

Related keywords