isl6296a Intersil Corporation, isl6296a Datasheet
isl6296a
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isl6296a Summary of contents
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... ISL6296A offers the same level of effectiveness as other significantly more expensive high maintenance monetary- grade hash algorithm and authentication schemes. The ISL6296A has a wide operating voltage range and is suitable for direct powering from a 1-cell Li-Ion/Li-Poly or a 3-cell series NiMH battery pack. The ISL6296A can also be powered by the XSD bus when the bus pull-up voltage is 3 ...
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... PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 2 ISL6296A TEMP. PACKAGE RANGE (°C) ...
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... XSD Internal Pull-Down Current XSD Output Low Voltage XSD Input Transition Time XSD Output Fall Time XSD Pin Capacitance 3 ISL6296A Thermal Information Thermal Resistance (Typical) SOT-23 Package (Note 2x3 TDFN Package (Notes Maximum Junction Temperature (Plastic Package +125°C Maximum Storage Temperature Range . . . . . . . . . .-40°C to +125°C Pb-free reflow profile ...
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... LD TDFN ISL6296A = -20°C to +85° SYMBOL TEST CONDITIONS Pulse width narrower than the deglitch time will not WDG cause the device to wake up t From falling-edge of break command issued by host to WKE ...
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... Typical Applications PACK+ XSD PACK- FIGURE 1. TYPICAL APPLICATION WITH THE ISL6296A POWERED BY THE BATTERY PACK+ XSD PACK- FIGURE 2. TYPICAL APPLICATION WITH THE ISL6296A POWERED BY THE XSD BUS Block Diagram XSD 5 ISL6296A 100Ω 100Ω XSD VDD ISL6296A VSS 0.1µ ...
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... ISL6296A initializes itself by loading the default device configuration information from pre-assigned locations within the OTP ROM memory. After initialization, a ‘break’ command is returned to the host to indicate that the 6 ISL6296A ISL6296A is ready and waiting for a bus transaction from the host. 60µs HOST BREAK TYP DEVICE BREAK ...
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... FlexiHash™ encoding scheme in detail. THE DEVICE AUTHENTICATION PROCESS To start an authentication process, the host sends a ‘break’ command to wake up the ISL6296A. Then the host writes to the SESL register to select the two sets of secrets to be used for authentication code generation. After that, the host generates a pseudo-random 4-Byte challenge code to input into the CHLG register to initiate the authentication process ...
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... Failure to follow the sequence will result is a bus error, causing the sBER flag to be set in the STAT register. SET-UP FOR DEVICE AUTHENTICATION SUPPORT To configure the host and the ISL6296A to support device authentication function, the pack manufacturer will need to select at least 2 sets of 32-bit secret codes. For greater security, a third set of 32-bit secret may be used. The FlexiHash™ ...
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... CHALLENGE CODE WORD SERIAL BIT-STREAM AN,BN,CN,DN CRC CALCULATOR SERIAL OUTPUTS XA,XB,XC,XD CRC CALCULATOR 8-BIT PARALLEL OUTPUTS MA,MB,MC,MD CRC POLYNOMIAL AND INPUT SELECTION CODES NA,NB,NC,ND CRC REGISTER INITIALIZATION SEEDS SNR{ } N-BIT CYCLICAL RIGHT SHIFT FUNCTION Y[7:0] 8-BIT AUTHENTICATION CODE OUTPUT FIGURE 7. BLOCK DIAGRAM OF THE FLEXIHASH ENGINE 9 ISL6296A 8 8 MA[2:0] MA[5: MB[2:0] MB[5: ...
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... TABLE 1. INTERRUPT EVENT SUMMARY INTERRUPT STATUS FLAG sEEW Accessing the ISL6296A during an on-going ROM write process (used only during initial OTP ROM programming). sBER XSD bus error or invalid instruction frame detected. Improper authentication sequence detected. ...
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... D ‘0’ pulse width t0 ‘0’ code transmit pulse width D ‘break’ time this range will be interpreted as a ‘break’ command D 11 ISL6296A V V DDH DDD ESD ESD R PU Diode DIODE ESD ESD ...
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... OPCODE FIELD The OPCODE is a 2-Bit field defines the operation of the transaction following the instruction frame. The operations are described in Table 4. BANK FIELD The memories in the ISL6296A are divided into four banks. The BANK field is defined in Table 5. BYTES DATA BYTES OTP ROM ...
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... Bus Transaction Protocol The XSD bus for the ISL6296A defines three types of bus transactions. Figure 11 shows the bus transaction protocol. The blue color represents the signal sent by the host and the green color stands for the signal sent by the device. Before the transaction starts, the host should make sure that the XSD device is not in the sleep mode ...
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... Analog Biasing Components and Clock Generation The analog section in the ISL6296A mainly includes the Time Base Generator and the internal regulator for powering the circuits in the ISL6296A. TIME BASE GENERATOR A time base generator is included on-chip to provide timing reference for serial data encoding and decoding at the XSD bus interface ...
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... Oscillator Frequency Trim Setting ADDRESS 0-00: DEFAULT CONFIGURATION (DCFG) This address location stores the default configuration when WRITE ACTION the ISL6296A is manufactured. Table 11 describes each bit in Data ignored detail. The legend for the TYPE column is given in Table 13. Data written ADDRESS 0-01: DEFAULT TRIM SETTING (DTRM) ...
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... Register Access Error Flag: This bit is set whenever an instruction frame attempts to access a protected register as follows: a) Writing to OTP ROM after the ISL6296A has been locked out (any or both of the lock-out bits set) b) Accessing the ISL6296A is Test and Trim Registers when the device is not in test mode ...
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... ESD diode, as shown in Figure 8. The 1 ESD diode has 0.4V drop typically. ESD Rating The ISL6296A ESD specification is rated at 4kV of the human body model. When the ISL6296A is used in a handheld accessory, a higher ESD rating is typically required. External components are required to enhance the ESD performance. Additional Application Information See “ ...
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... C L 0.20 (0.008 0.10 (0.004 WITH PLATING b1 c BASE METAL 4X θ1 R1 SEATING L PLANE α θ1 VIEW C 18 ISL6296A P5.064 VIEW C 5 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE SYMBOL α SEATING e PLANE e1 -C- L ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 19 ISL6296A L8.2x3A 0.15 C ...