SST25VF064C Silicon Storage Technology, Inc., SST25VF064C Datasheet - Page 26

• Manufacturer Part Number: SST25VF064C
• Description: 64 Mbit Spi Serial Dual I/o Flash
• Manufacturer: Silicon Storage Technology, Inc.

Data Sheet
Power-Up Specifications
All functionalities and DC specifications are specified for a V
in less than 300 ms). If the VDD ramp rate is slower than 1V/100 ms, a hardware reset is required. The recom-
mended V
and Figures 26 and 27 for more information.
TABLE 14: Recommended System Power-up Timings
©2009 Silicon Storage Technology, Inc.
Symbol
T
T
PU-READ
PU-WRITE
FIGURE 26: Power-Up Reset Diagram
FIGURE 27: Power-up Timing Diagram
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
1
1
DD
V
V
DD
DD
power-up to RESET# high time should be greater than 100 µs to ensure a proper reset. See Table 14
V
Max
Min
DD
Parameter
V
V
DD
DD
Chip selection is not allowed.
All commands are rejected by the device.
Min to Read Operation
Min to Write Operation
RESET#
Note: See Table 2 on page 5 for T
V
CE#
DD
0V
V
DD
min
RECR
T
T
PU-READ
PU-WRITE
T
26
PU-READ
parameter.
DD
ramp rate of greater than 1V per 100 ms (0V to 3V
Device fully accessible
64 Mbit SPI Serial Dual I/O Flash
V
IH
T
RECR
1203 F37.0
Minimum
100
100
Time
SST25VF064C
S71392-01-000
1392 F26.0
Units
µs
µs
T14.0 1392
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