S25FL064A Meet Spansion Inc., S25FL064A Datasheet - Page 25
![no-image](/images/no-image-200.jpg)
S25FL064A
Manufacturer Part Number
S25FL064A
Description
64 Megabit Cmos 3.0 Volt Flash Memory With 50 Mhz Spi Bus Interface
Manufacturer
Meet Spansion Inc.
Datasheet
1.S25FL064A.pdf
(36 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
S25FL064A0LMFI001
Manufacturer:
SPANSION
Quantity:
234
Part Number:
S25FL064A0LMFI001
Manufacturer:
SPANSION
Quantity:
20 000
Company:
Part Number:
S25FL064AIF
Manufacturer:
AUK
Quantity:
6 023
Part Number:
S25FL064AIF
Manufacturer:
SPANSION
Quantity:
20 000
Part Number:
S25FL064AOLMFI001
Manufacturer:
SPANSI
Quantity:
20 000
9.11
26
Deep Power Down (DP)
The Deep Power Down (DP) command provides the lowest power consumption mode of the device. It is
intended for periods when the device is not in active use, and ignores all commands except for the Release
from Deep Power Down (RES) command. The DP mode therefore provides the maximum data protection
against unintended write operations. The standard standby mode, which the device goes into automatically
when CS# is high (and all operations in progress are complete), should generally be used for the lowest
power consumption when the quickest return to device activity is required.
The host system must drive CS# low, and then write the DP command on SI. CS# must be driven low for the
entire duration of the DP sequence. The command sequence is shown in
on page
The host system must drive CS# high after the device has latched the 8th bit of the DP command, otherwise
the device does not execute the command. After a delay of t
reduces from I
Once the device has entered the DP mode, all commands are ignored except the RES command (which
releases the device from the DP mode). The RES command also provides the Electronic Signature of the
device to be output on SO, if desired (see
DP mode automatically terminates when power is removed, and the device always powers up in the standard
standby mode. The device rejects any DP command issued while it is executing a program, erase, or Write
Status Register operation, and continues the operation uninterrupted.
28.
SCK
CS#
SO
SI
SB
Hi-Z
Mode 3
Mode 0
to I
DP
(see
Figure 9.11 Deep Power Down (DP) Command Sequence
Table 14.1 on page
0
1
2
S25FL064A
Command
Section 9.12
3
D a t a
4
31).
5
Standby Mode
6
S h e e t
and 9.12.1).
7
DP,
the device enters the DP mode and current
t DP
Figure 9.11
S25FL064A_00_C3 June 29, 2007
Deep Power-down Mode
and
Table 9.4