S25FL064A Meet Spansion Inc., S25FL064A Datasheet - Page 28
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S25FL064A
Manufacturer Part Number
S25FL064A
Description
64 Megabit Cmos 3.0 Volt Flash Memory With 50 Mhz Spi Bus Interface
Manufacturer
Meet Spansion Inc.
Datasheet
1.S25FL064A.pdf
(36 pages)
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10. Power-up and Power-down
11. Initial Delivery State
June 29, 2007 S25FL064A_00_C3
During power-up and power-down, certain conditions must be observed. CS# must follow the voltage applied
on V
(see
A pull-up resistor on Chip Select (CS#) typically meets proper power-up and power-down requirements.
No Write Status Register, program, or erase command should be sent to the device until V
min, plus a delay of t
WEL bit is reset (0).
Each device in the host system should have the V
package pins (this capacitor is generally of the order of 0.1 µF), as a precaution to stabilizing the V
When V
operations are disabled and the device does not respond to any commands. Note that data corruption may
result if a power-down occurs while a Write Register, program, or erase operation is in progress.
The device is delivered with all bits set to 1 (each byte contains FFh) upon initial factory shipment. The Status
Register contains 00h (all Status Register bits are 0).
At power-up, V
At power-down, V
CC
Figure 10.1
Symbol
V
CC(min)
, and must not be driven low to select the device until V
t
CC
PU
drops from the operating voltage to below the minimum V
and
CC
V
V
SS
(min) plus a period of t
PU
cc
cc
Table
(max)
(min)
. At power-up, the device is in standby mode (not Deep Power Down mode) and the
V
D a t a
cc
10.1):
Table 10.1 Power-Up Timing Characteristics
Figure 10.1 Power-Up Timing Diagram
S h e e t
V
CC
(min) to device operation
S25FL064A
V
CC
Parameter
PU
(minimum)
t
PU
CC
rail decoupled by a suitable capacitor close to the
CC
reaches the allowable values as follows
Full Device Access
CC
threshold at power-down, all
Time
Min
2.7
10
CC
Max
rises to the V
CC
feed.
Unit
ms
V
CC
29