EMD56324P Emlsi Inc., EMD56324P Datasheet - Page 39

• Manufacturer Part Number: EMD56324P
• Description: 256m 8m X 32 Mobile Ddr Sdram
• Manufacturer: Emlsi Inc.

READ Interrupted by Precharge (@ BL=8, CL=2)
CK
CKB
CKE
CSB
RASB
CASB
BA0,BA1
A10/AP
ADDR
WEB
DQS
DQ
DM
COMMAND
When a burst Read command is issued to a DDR SDRAM, a Prechcrge command may be issued to the same bank before the Read burst is
complete. The following functionality determines when a Precharge command may be given during a Read burst and when a new Bank Activate
command may be issued to the same bank.
1. For the earliest possible Precharge command without interrupting a Read burst, the Precharge command may be given on the rising clock
2. When a Precharge command interrupts a Read burst operation, the Precharge command may be given on the rising clock edge which is CL
edge which is CL clock cycles before the end of the Read burst where CL is the CAS Latency. A new Bank Activate command may be issued
to the same bank after tRP.
output buffers are tristated. A new Bank Activate command may be issued to the same bank after tRP.
clock cycles before the last data from the interrupted Read burst where CL is the CAS Latency. Once the last data word has been output, the
DISABLE AUTO PRECHARGE
0
READ
BAa
Ca
1
2
Qa0 Qa1 Qa2 Qa3 Qa4 Qa5
3
CHARGE
ALL BANK
BAa
PRE
4
39
t
CH
t
CK
2 t
t
CL
CK
valid
5
HIGH
6
256M: 8M x 32 Mobile DDR SDRAM
7
EMD56324P
8
Preliminary
9
Rev 0.0
10