cs42324 Cirrus Logic, Inc., cs42324 Datasheet - Page 46

• Manufacturer Part Number: cs42324
• Description: 10-in, 6-out, 2 Vrms Audio Codec
• Manufacturer: Cirrus Logic, Inc.

46
6. REGISTER DESCRIPTION
All registers are read/write except where otherwise noted. See the following bit definition tables for bit assignment
information. The default state of each bit after release of reset is listed in the shaded row of each bit description
table. When writing to registers containing “Reserved” bits, all bits marked as “Reserved” must maintain their default
values.
6.1
6.1.1
6.1.2
6.2
6.2.1
6.2.2
DEVICE3
Reserved
7
7
Device I.D. and Revision Register (Address 00h) (Read Only)
Mute Control (Address 01h)
Device I.D. (Read Only)
I.D. code for the CS42324.
Chip Revision (Read Only)
CS42324 revision level.
System MCLK Source
This bit selects which MCLK pin provides the clock for internal state machines. It must always be set to
whichever clock is currently active.
Mute DAC2 Left-Channel
When set, this bit engages internal mute circuit on DAC2 output.
0110
000
001
0
1
0
1
DAC2_MuteL
DEVICE[3:0]
SYS_MCLK
REV[3:0]
SYS_MCLK
DEVICE2
6
6
CS42324
A1
B0
MCLK1
MCLK2
Un-muted
Muted
DEVICE1
DAC2_
MuteL
5
5
DEVICE0
DAC2_
MuteR
4
4
Mute status of DAC2 Left-channel
System MCLK source
DAC1_
MuteL
REV3
Revision Level
3
3
Device
DAC1_
MuteR
REV2
2
2
MuteL
REV1
ADC_
1
1
CS42324
MuteR
DS721A6
REV0
ADC_
0
0