cs4341a Cirrus Logic, Inc., cs4341a Datasheet - Page 30

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cs4341a

Manufacturer Part Number
cs4341a
Description
24-bit, 192 Khz Stereo Dac With Volume Control
Manufacturer
Cirrus Logic, Inc.
Datasheet

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SWITCHING SPECIFICATIONS - CONTROL PORT INTERFACE
(Inputs: Logic 0 = AGND, Logic 1 = VA)
Notes: 7. Data must be held for sufficient time to bridge the transition time, t
30
I
SCL Clock Frequency
RST Rising Edge to Start
Bus Free Time Between Transmissions
Start Condition Hold Time (prior to first clock pulse)
Clock Low time
Clock High Time
Setup Time for Repeated Start Condition
SDA Hold Time from SCL Falling
SDA Setup time to SCL Rising
Rise Time of SCL
Fall Time SCL
Rise Time of SDA
Fall Time SDA
Setup Time for Stop Condition
2
C Mode
R S T
S D A
S C L
8. See “Rise Time for Control Port Clock” on page 11. for a recommended circuit to meet rise time
specification.
Stop
t irs
t buf
Parameter
S ta rt
t hdst
t
lo w
Figure 19. Control Port Timing - I
t
hdd
t high
(Note 7)
(Note 8)
t sud
Symbol
t
t
t
t
t
t
t
t
susp
f
hdst
high
t
sust
hdd
sud
t
low
t
t
t
buf
scl
irs
rc
rd
fd
fc
R e p e a te d
t sust
S ta rt
2
C Mode
t
hdst
fc
, of SCL.
Min
500
250
4.7
4.0
4.7
4.0
4.7
4.7
0
-
-
-
-
-
t r
t f
Max
100
300
25
25
1
-
-
-
-
-
-
-
-
-
CS4341A
Stop
t susp
DS582F2
Unit
kHz
ns
µs
µs
µs
µs
µs
µs
ns
ns
ns
µs
ns
µs

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