t81l0010b TM Technology Inc., t81l0010b Datasheet - Page 10

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t81l0010b

Manufacturer Part Number
t81l0010b
Description
T81l0010b 8-bit Mcu With Embedded Eeprom
Manufacturer
TM Technology Inc.
Datasheet
9.3. EEPROM Interface
SPICON:
OPCODE
TM Technology Inc. reserves the right
to change products or specifications without notice.
WRALL (Write All Registers)
MSB
MSB
Bit 7
Bit 7
WEN (Write Enable)
WDS (Write Disable)
tm
The EEPROM interface timing is fully compatible with 93C46. To access or send data from/to T81L0010B , 6 registers
are going to be controlled.
EEPROM Register Control
Epst: start EEPROM timing. “1” to start and will be auto cleared after timing finish.
Epdiv[1..0]: divide input clock into EEPROM system clock.
DATAW_H
DATAW_L
DATAW_L
DATAR_H
Instruction Set
OPCODE
SPICON
OP Code
ERAL
Write
Erase
Read
10: divide by 64
01: divide by 32
else: divide by 16
Bit 6
Bit 6
CH
TE
Default
00H
00H
00H
00H
Bit5
Bit5
--
--
-
--
OP Code
--
-
10
00
01
00
00
11
00
Bit 4
Bit 4
--
--
-
Bit 3
Bit 3
--
P. 10
--
-
address
--
Address
Epdiv1
11xxxx
01xxxx
00xxxx
10xxxx
A5-A0
A5-A0
A5-A0
Bit 2
Bit 2
--
-
Preliminary T81L0010B
B2: R/W
Epdiv1
-
Epdiv0
Bit1
Bit1
Publication Date: JAN. 2006
B1: R/W
Epdiv0
-
Input Data
Bit 0
Bit 0
Epst
LSB
LSB
D15-D0
D15-D0
B0: R/W
Epst
W
Revision:A

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