mcf5249pb Freescale Semiconductor, Inc, mcf5249pb Datasheet - Page 11

• Manufacturer Part Number: mcf5249pb
• Description: Mcf5249 Integrated Coldfire Microprocessor
• Manufacturer: Freescale Semiconductor, Inc

1.5.17 Analog/Digital Converter (ADC)
The four channel ADC is based on the Sigma-Delta concept with 12-bit resolution. The digital portion of
the ADC is provided internally. The analog voltage comparator must be provided externally as well as an
external integrator circuit (resistor/capacitor) which is driven by the ADC output. A software interrupt is
provided when the ADC measurement cycle is complete.
1.5.18 Flash Memory Card Interface
The interface is Sony MemoryStick and SecureDigital compatible. However, there is no hardware support
for MagicGate™.
1.5.19 I
The two-wire I
bus that exchanges data between devices. The I
end system and is best suited for applications that need occasional bursts of rapid communication over short
distances among several devices. Bus capacitance and the number of unique addresses limit the maximum
communication length and the number of devices that can be connected.
1.5.20 Chip-Selects
There are four programmable chip selects on the MCF5249:
CS0 is active after reset to provide boot-up from external FLASH/ROM.
1.5.21 GPIO Interface
A total of 44 General Purpose inputs and 46 General Purpose outputs are available. These are multiplexed
with various other signals. Eight of the GPIO inputs have edge sensitive interrupt capability.
1.5.22 Interrupt Controller
The interrupt controller provides user-programmable control of a total of 57 interrupts. There are 49 internal
interrupt sources. In addition, there are 8 GPIOs where interrupts can be generated on the rising or falling
edge of the pin. All interrupts are autovectored and interrupt levels are programmable.
1.5.23 JTAG
To help with system diagnostics and manufacturing testing, the MCF5249 includes dedicated
user-accessible test logic that complies with the IEEE 1149.1A standard for boundary scan testability, often
referred to as Joint Test Action Group, or JTAG. For more information, refer to the IEEE 1149.1A standard.
Motorola provides BSDL files for JTAG testing.
MOTOROLA
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Two programmable chip-select outputs (CS0 and CS1) provide signals that enable glueless
connection to external memory and peripheral circuits. The base address, access permissions, and
automatic wait-state insertion are programmable with configuration registers. These signals also
interface to 16-bit ports.
Two dedicated chip selects (CS2 and CS3) are used for the IDE and/or SmartMedia interface
2
2
C Module
C bus interface, which is compliant with the Philips I
MCF5249 Integrated ColdFire® Microprocessor Product Brief
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
2
C bus minimizes the interconnection between devices in the
2
C bus standard, is a bidirectional serial
MCF5249 Functional Overview
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