MC74AC273DWR2G ON Semiconductor, MC74AC273DWR2G Datasheet

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MC74AC273DWR2G

Manufacturer Part Number
MC74AC273DWR2G
Description
IC FLIP FLOP D OCTAL CMOS 20SOIC
Manufacturer
ON Semiconductor
Series
74ACr
Type
D-Type Busr
Datasheet

Specifications of MC74AC273DWR2G

Function
Master Reset
Output Type
Non-Inverted
Number Of Elements
1
Number Of Bits Per Element
8
Frequency - Clock
175MHz
Delay Time - Propagation
5.5ns
Trigger Type
Positive Edge
Current - Output High, Low
24mA, 24mA
Voltage - Supply
2 V ~ 6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
MC74AC273DWR2GOS

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC74AC273DWR2G
Manufacturer:
ON Semiconductor
Quantity:
345
MC74AC273, MC74ACT273
Octal D Flip−Flop
flip−flops with individual D inputs and Q outputs. The common
buffered Clock (CP) and Master Reset (MR) inputs load and reset
(clear) all flip−flops simultaneously.
setup time before the LOW−to−HIGH clock transition, is transferred
to the corresponding flip−flop’s Q output.
inputs by a LOW voltage level on the MR input. The device is useful
for applications where the true output only is required and the Clock
and Master Reset are common to all storage elements.
Features
*For additional information on our Pb−Free strategy and soldering details, please
© Semiconductor Components Industries, LLC, 2005
December, 2005 − Rev. 6
MODE SELECT-FUNCTION TABLE
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
Reset (Clear)
Load ′1′
Load ′0′
The MC74AC273/74ACT273 has eight edge-triggered D−type
The register is fully edge-triggered. The state of each D input, one
All outputs will be forced LOW independently of Clock or Data
Ideal Buffer for MOS Microprocessor or Memory
Eight Edge-Triggered D Flip−Flops
Buffered Common Clock
Buffered, Asynchronous Master Reset
See MC74AC377 for Clock Enable Version
See MC74AC373 for Transparent Latch Version
See MC74AC374 for 3-State Version
Outputs Source/Sink 24 mA
′ACT273 Has TTL Compatible Inputs
Pb−Free Packages are Available*
= LOW-to-HIGH Clock Transition
Operating Mode
V
MR
20
1
CC
Pinout: 20−Lead Packages Conductors
Q
Q
19
2
7
0
D
D
18
3
7
0
D
D
17
4
6
1
MR
H
H
(Top View)
L
Q
Q
16
5
6
1
Inputs
CP
Q
Q
X
15
6
5
2
D
D
D
14
X
H
L
7
5
2
n
Outputs
D
13
D
8
4
3
Q
H
L
L
n
Q
12
Q
9
4
3
GND
CP
11
10
1
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
See general marking information in the device marking
section on page 6 of this data sheet.
20
20
20
20
DEVICE MARKING INFORMATION
PIN
D
MR
CP
Q
0
0
1
−D
−Q
ORDERING INFORMATION
CP
MR
7
7
D
Q
1
http://onsemi.com
1
PIN ASSIGNMENT
0
1
0
D
Q
1
1
Logic Symbol
FUNCTION
Data Inputs
Master Reset
Clock Pulse Input
Data Outputs
D
Q
2
2
D
Q
Publication Order Number:
3
3
D
Q
4
4
D
Q
SOIC−20WB
SUFFIX DW
CASE 751D
CASE 948E
SOEIAJ−20
5
5
TSSOP−20
SUFFIX DT
CASE 738
SUFFIX M
CASE 967
SUFFIX N
PDIP−20
D
Q
MC74AC273/D
6
6
D
Q
7
7

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MC74AC273DWR2G Summary of contents

Page 1

... Load ′0′ HIGH Voltage Level L = LOW Voltage Level X = Immaterial = LOW-to-HIGH Clock Transition *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2005 December, 2005 − Rev ...

Page 2

NOTE: That this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. MAXIMUM RATINGS ...

Page 3

... NOTE: Note: I and I @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5 CHARACTERISTICS (For Figures and Waveforms − See Section 3 of the ON Semiconductor FACT Data Book, DL138/D) Symbol Parameter Maximum Clock f max Frequency Propagation Delay ...

Page 4

... Maximum Quiescent Supply Current CC *All outputs loaded; thresholds on input associated with output under test. †Maximum test duration 2.0 ms, one output loaded at a time. AC CHARACTERISTICS (For Figures and Waveforms − See Section 3 of the ON Semiconductor FACT Data Book, DL138/D) Symbol Parameter f Maximum Clock Frequency ...

Page 5

... ORDERING INFORMATION Device MC74AC273N MC74AC273NG MC74ACT273N MC74ACT273NG MC74AC273DW MC74AC273DWG MC74AC273DWR2 MC74AC273DWR2G MC74AC273DTR2 MC74AC273DTR2G MC74ACT273DW MC74ACT273DWG MC74ACT273DWR2 MC74ACT273DWR2G MC74ACT273DTR2 MC74ACT273DTR2G MC74AC273MEL MC74AC273MELG MC74ACT273M MC74ACT273MG MC74ACT273MEL MC74ACT273MELG †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb− ...

Page 6

PDIP− MC74AC273N AWLYYWWG MC74ACT273N AWLYYWWG 1 1 −A− −T− SEATING PLANE 0.25 (0.010) MC74AC273, MC74ACT273 MARKING DIAGRAMS SOIC−20WB TSSOP− AC273 273 AWLYYWWG ...

Page 7

20X 0. 18X A1 K 20X REF 0.10 (0.004) 0.15 (0.006 L PIN 1 IDENT 1 0.15 (0.006) ...

Page 8

... E L DETAIL P VIEW American Technical Support: 800−282−9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 http://onsemi.com 8 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. ...

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