ltc2415-1 Linear Technology Corporation, ltc2415-1 Datasheet - Page 10

• Manufacturer Part Number: ltc2415-1
• Description: 24-bit No Latency Delta Sigma Adc With Differential Input And Differential Reference
• Manufacturer: Linear Technology Corporation

LTC2415/LTC2415-1
PI FU CTIO S
GND (Pins 1, 7, 8, 9, 10, 15, 16): Ground. Multiple ground
pins internally connected for optimum ground current flow
and V
ground plane through a low impedance connection. All seven
pins must be connected to ground for proper operation.
V
(Pin 1) with a 10 F tantalum capacitor in parallel with
0.1 F ceramic capacitor as close to the part as possible.
REF
The voltage on these pins can have any value between GND
and V
maintained more positive than the reference negative
input, REF
IN
voltage on these pins can have any value between
GND – 0.3V and V
converter bipolar input range (V
from – 0.5 • (V
the converter produces unique overrange and underrange
output codes.
10
TYPICAL PERFOR A CE CHARACTERISTICS
CC
+
U
+
(Pin 5), IN
(Pin 2): Positive Supply Voltage. Bypass to GND
CC
(Pin 3), REF
CC
decoupling. Connect each one of these pins to a
as long as the reference positive input, REF
U
–
1000
, by at least 0.1V.
900
800
700
600
500
400
300
200
100
0
REF
0
Conversion Current vs Output
Data Rate
–
V
REF
REF
IN
IN
F
CS = GND
SCK =N/C
SDO = N/C
O
) to 0.5 • (V
CC
10 20 30 40 50 60 70 80 90 100
(Pin 6): Differential Analog Input. The
OUTPUT DATA RATE (READINGS/SEC)
+
–
= EXT OSC
–
+
–
= GND
= GND
= 5V
= 5V
= GND
(Pin 4): Differential Reference Input.
CC
U
+ 0.3V. Within these limits the
W
REF
). Outside this input range
IN
U
= IN
+
2415 G37
– IN
–
) extends
+
, is
CS (Pin 11): Active LOW Digital Input. A LOW on this pin
enables the SDO digital output and wakes up the ADC.
Following each conversion, the ADC automatically enters
the Sleep mode and remains in this low power state as
long as CS is HIGH. A LOW-to-HIGH transition on CS
during the Data Output transfer aborts the data transfer
and starts a new conversion.
SDO (Pin 12): Three-State Digital Output. During the Data
Output period, this pin is used as serial data output. When
the chip select CS is HIGH (CS = V
high impedance state. During the Conversion and Sleep
periods, this pin is used as the conversion status output.
The conversion status can be observed by pulling CS LOW.
SCK (Pin 13): Bidirectional Digital Clock Pin. In Internal
Serial Clock Operation mode, SCK is used as digital output
for the internal serial interface clock during the Data
Output period. In External Serial Clock Operation mode,
SCK is used as digital input for the external serial interface
clock during the Data Output period. A weak internal pull-
up is automatically activated in Internal Serial Clock Op-
eration mode. The Serial Clock Operation mode is deter-
mined by the logic level applied to the SCK pin at power up
or during the most recent falling edge of CS.
25
24
23
22
21
20
19
18
17
16
15
–45 –30 –15
Sleep Current vs
Temperature (T
V
V
V
F
CS = V
SCK = SDO = N/C
O
REF
REF
IN
= GND
+
+
–
= V
= V
= GND
CC
IN
CC
–
= GND
TEMPERATURE ( C)
0
15
A
)
V
V
30
CC
CC
= 5.5V
= 2.7V
45
CC
) the SDO pin is in a
V
60
CC
= 4.1V
75
2415 G38
90
sn2415 24151fs