ltc2415-1 Linear Technology Corporation, ltc2415-1 Datasheet - Page 37

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ltc2415-1

Manufacturer Part Number
ltc2415-1
Description
24-bit No Latency Delta Sigma Adc With Differential Input And Differential Reference
Manufacturer
Linear Technology Corporation
Datasheet

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********************************************
* The next short loop waits for the
* LTC2415/LTC2415-1’s conversion to finish before *
* starting the SPI data transfer
********************************************
*
CONVEND LDAA
*
*
*
*
*
********************
* The SPI data transfer *
********************
*
TRFLP1 LDAA
*
WAIT1
*
*
*
*
TYPICAL APPLICATIO S
ANDA
BNE
STAA
LDAA
BPL
LDAA
STAA
INX
CPX
BNE
BSET
PULA
PULY
PULX
RTS
PORTD
#%00000100
CONVEND
#$0
SPDR
SPSR
WAIT1
SPDR
0,X
#DIN4+1 Has the last byte been transferred/exchanged?
TRFLP1 If the last byte has not been reached, then proceed to the
PORTD,Y %00100000 This sets the SS* output bit to a logic high,
Figure 38. This is an Example of 68HC11 Code That Captures the LTC2415/LTC2415-1
Conversion Results Over the SPI Serial Interface Shown in Figure 40
Load accumulator A with a null byte for SPI transfer
This writes the byte in the SPI data register and starts
the transfer
This loop waits for the SPI to complete a serial
transfer/exchange by reading the SPI Status Register
The SPIF (SPI transfer complete flag) bit is the SPSR’s MSB
and is set to one at the end of an SPI transfer. The branch
will occur while SPIF is a zero.
Load accumulator A with the current byte of LTC2415/LTC2415-1 data
that was just received
Transfer the LTC2415/LTC2415-1’s data to memory
Increment the pointer
next byte for transfer/exchange
de-selecting the LTC2415/LTC2415-1
Restore the A register
Restore the Y register
Restore the X register
Retrieve the contents of port D
Look at bit 2
Bit 2 = Hi; the LTC2415/LTC2415-1’s conversion is not
complete
Bit 2 = Lo; the LTC2415/LTC2415-1’s conversion is complete
Branch to the loop’s beginning while bit 2 remains
high
U
*
*
LTC2415/LTC2415-1
sn2415 24151fs
37

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