ltc3851-1 Linear Technology Corporation, ltc3851-1 Datasheet - Page 8

no-image

ltc3851-1

Manufacturer Part Number
ltc3851-1
Description
Synchronous Step-down Switching Regulator Controller
Manufacturer
Linear Technology Corporation
Datasheet
PIN FUNCTIONS
LTC3851-1
MODE/PLLIN (Pin 1/Pin 15): Force Continuous Mode,
Burst Mode or Pulse skipping Mode Selection Pin and
External Synchronization Input to Phase Detector Pin.
Connect this pin to INTV
mode of operation. Connect to GND to enable pulse skip-
ping mode of operation. To select Burst Mode operation,
tie this pin to INTV
but no greater than 250k. A clock on the pin will force the
controller into forced continuous mode of operation and
synchronize the internal oscillator.
FREQ/PLLFLTR (Pin 2/Pin 16): The phase-locked loop’s
lowpass fi lter is tied to this pin. Alternatively, a resistor
can be connected between this pin and GND to vary the
frequency of the internal oscillator.
RUN (Pin 3/Pin 1): Run Control Input. A voltage above
1.25V on this pin turns on the IC. However, forcing this
pin below 1.1V causes the IC to shut down the IC. There
is a 2μA pull-up current on this pin.
TK/SS (Pin 4/Pin 2): Output Voltage Tracking and Soft-Start
Input. A capacitor to ground at this pin sets the ramp rate
for the output voltage. An internal soft-start current of of
1μA charges this capacitor.
I
Amplifi er Compensation Point. The current comparator
tripping threshold increases with its I
FB (Pin 6/Pin 4): Error Amplifi er Feedback Input. This pin
receives the remotely sensed feedback voltage from an
external resistive divider across the output.
SENSE
Input. The (–) input to the current comparator is connected
to the output.
SENSE
inverting Input. The (+) input to the current comparator
is normally connected to the DCR sensing network or
current sensing resistor.
8
TH
(Pin 5/Pin 3): Current Control Threshold and Error
+
(Pin 7/Pin 5): Current Sense Comparator Inverting
(Pin 8/Pin 6): Current Sense Comparator Non-
CC
through a resistor no less than 50k,
CC
to force continuous conduction
(MSE/UD)
TH
control voltage.
PGOOD (Pin 9/Pin 7): Power Good Indicator Output. Open-
drain logic out that is pulled to ground when the output
voltage exceeds the ±10% regulation window, after the
internal 17μs power bad mask timer expires.
GND (Pin 10/Pin 8): Ground. All small-signal components
and compensation components should be Kelvin connected
to this ground. The (–) terminal of CV
of C
BG (Pin 11/Pin 9): Bottom Gate Driver Output. This pin
drives the gate of the bottom N-channel MOSFET between
GND and INTV
INTV
control circuit is powered from this voltage. Decouple this
pin to GND with a minimum 2.2μF low ESR tantalum or
ceramic capacitor.
V
to GND with a capacitor.
BOOST (Pin 14/Pin 12): Boosted Floating Driver Supply.
The (+) terminal of the boost-strap capacitor is connected
to this pin. This pin swings from a diode voltage drop
below INTV
TG (Pin 15/Pin 13): Top Gate Driver Output. This is the
output of a fl oating driver with a voltage swing equal to
INTV
SW (Pin 16/Pin 14): Switch Node Connection to the In-
ductor. Voltage swing at this pin is from a Schottky diode
(external) voltage drop below ground to V
Exposed Pad (Pin 17): Ground. Must be soldered to PCB,
providing a local ground for the IC.
IN
(Pin 13/Pin 11): Main Input Supply. Decouple this pin
IN
CC
CC
should be closely connected to this pin.
(Pin 12/Pin 10): Internal 5V Regulator Output. The
superimposed on the switch node voltage.
CC
up to V
CC
.
IN
+ INTV
CC
.
CC
and the (–) terminal
IN
.
38511f

Related parts for ltc3851-1