ltc3853euj Linear Technology Corporation, ltc3853euj Datasheet - Page 17

• Manufacturer Part Number: ltc3853euj
• Description: Triple Output, Multiphase Synchronous Step-down Controller
• Manufacturer: Linear Technology Corporation

APPLICATIONS INFORMATION
Inductor Core Selection
Once the inductance value is determined, the type of in-
ductor must be selected. Core loss is independent of core
size for a fi xed inductor value, but it is very dependent
on inductance selected. As inductance increases, core
losses go down. Unfortunately, increased inductance
requires more turns of wire and therefore copper losses
will increase.
Ferrite designs have very low core loss and are preferred
at high switching frequencies, so design goals can con-
centrate on copper loss and preventing saturation. Ferrite
core material saturates “hard,” which means that induc-
tance collapses abruptly when the peak design current is
exceeded. This results in an abrupt increase in inductor
ripple current and consequent output voltage ripple. Do
not allow the core to saturate!
Power MOSFET and Schottky Diode
(Optional) Selection
Two external power MOSFETs must be selected for each
controller in the LTC3853: one N-channel MOSFET for the
top (main) switch, and one N-channel MOSFET for the
bottom (synchronous) switch.
The peak-to-peak drive levels are set by the INTV
DRV
up (see EXTV
threshold MOSFETs must be used in most applications.
The only exception is if low input voltage is expected (V
< 5V); then, sub-logic level threshold MOSFETs (V
< 3V) should be used. Pay close attention to the BV
specifi cation for the MOSFETs as well; most of the logic
level MOSFETs are limited to 30V or less.
Selection criteria for the power MOSFETs include the on-
resistance, R
voltage and maximum output current. Miller capacitance,
C
usually provided on the MOSFET manufacturers’ data
sheet. C
along the horizontal axis while the curve is approximately
fl at divided by the specifi ed change in V
then multiplied by the ratio of the application applied V
to the gate charge curve specifi ed V
MILLER
CC12
, can be approximated from the gate charge curve
MILLER
voltage. This voltage is typically 5V during start-
CC
DS(ON)
Pin Connection). Consequently, logic-level
is equal to the increase in gate charge
, Miller capacitance, C
DS
. When the IC is
DS
. This result is
MILLER
, input
GS(TH)
DSS
CC
DS
IN
/
operating in continuous mode the duty cycles for the top
and bottom MOSFETs are given by:
The MOSFET power dissipations at maximum output
current are given by:
where δ is the temperature dependency of R
R
at the MOSFET’s Miller threshold voltage. V
typical MOSFET minimum threshold voltage.
Both MOSFETs have I
equation includes an additional term for transition losses,
which are highest at high input voltages. For V
the high current effi ciency generally improves with larger
MOSFETs, while for V
increase to the point that the use of a higher R
with lower C
synchronous MOSFET losses are greatest at high input
voltage when the top switch duty factor is low or during
a short-circuit when the synchronous switch is on close
to 100% of the period.
The term (1 + δ) is generally given for a MOSFET in the
form of a normalized R
δ = 0.005/°C can be used as an approximation for low
voltage MOSFETs.
DR
Main Switch Duty Cycle
P
Synchronous Swit
P
SYNC
MAIN
(approximately 2Ω) is the effective driver resistance
=
=
( )
⎡
⎢
⎢
⎣
V
MILLER
V
V
V
IN
V
INTVCC
IN
OUT
IN
2
–
V
IN
⎛
⎝ ⎜
(
V
actually provides higher effi ciency. The
I
I
OUT
MAX
MAX
2
–
IN
2 2
R losses while the topside N-channel
1
V
DS(ON)
> 20V the transition losses rapidly
c c h Duty Cycle
(
)
⎞
⎠ ⎟
TH MIN
I
2
MAX
(
(
(
R
1 δ
DR
+
=
vs Temperature curve, but
) )
)
2
)(
V
)
(
+
V
OUT
R
C
1 δ R
IN
+
MILLER
V
DS ON
T T H MIN
(
)
(
1
LTC3853
=
)
DS ON
V
+
)
)
TH(MIN)
IN
(
DS(ON)
•
⎤
⎥
⎥
⎦
DS(ON)
•
–
V
)
IN
f
IN
V
OSC
17
OUT
device
< 20V
is the
and
3853f