ltc3612 Linear Technology Corporation, ltc3612 Datasheet - Page 18

• Manufacturer Part Number: ltc3612
• Description: 3a, 4mhz Monolithic Synchronous Step-down Dc/dc Converter
• Manufacturer: Linear Technology Corporation

LTC3612
APPLICATIONS INFORMATION
Normally, several capacitors in parallel are required to
meet microprocessor transient requirements. Capacitor
ESR and ESL primarily determine the amount of droop or
overshoot in the output voltage.
Consider the LTC3612 without AVP with a bank of tantalum
output capacitors. If a load step with very fast slew rate
occurs, the voltage excursion will be seen in both direc-
tions, for full load to minimum load transient and for the
minimum load to full load transient.
If the ITH pin is tied to SV
(AVP) mode and internal compensation are selected.
AVP mode intentionally compromises load regulation by
reducing the gain of the feedback circuit, resulting in an
output voltage that varies with load current. When the load
current suddenly increases, the output voltage starts from
a level slightly higher than nominal so the output voltage
18
Figure 3. Load Step Transient Forced Continuous Mode
(AVP Inactive)
Figure 4. Load Step Transient Forced Continuous Mode
with AVP Mode
200mV/DIV
100mV/DIV
1A/DIV
1A/DIV
V
V
OUT
OUT
I
I
L
L
V
V
I
V
COMPENSATION FIGURE 1
V
V
I
V
V
OUTPUT CAPACITOR VALUE FIGURE 1
LOAD
LOAD
IN
OUT
MODE
IN
OUT
MODE
ITH
= 3.3V
= 3.3V
= 3.3V
= 1.8V
= 1.8V
= 100mA TO 3A
= 100mA TO 3A
= 1.5V
= 1.5V
IN
50μs/DIV
50μs/DIV
, the active voltage positioning
3612 F03
3612 F04
can droop more and stay within the specifi ed voltage
range. When the load current suddenly decreases the
output voltage starts at a level lower than nominal so the
output voltage can have more overshoot and stay within
the specifi ed voltage range (see Figures 3 and 4).
The benefi t is a lower peak-to-peak output voltage deviation
for a given load step without having to increase the output
fi lter capacitance. Alternatively, the output voltage fi lter ca-
pacitance can be reduced while maintaining the same peak
to peak transient response. Due to the reduced loop gain
in AVP mode, no external compensation is required.
DDR Mode
The LTC3612 can both source and sink current if the MODE
pin is confi gured to forced continuous mode.
Current sinking is typically limited to 1.5A, for 1MHz
frequency and a 1μH inductor, but can be lower at higher
frequencies and low output voltages. If higher ripple current
can be tolerated, smaller inductor values can increase the
sink current limit. See the Typical Performance Charac-
teristics curves for more information.
In addition, tying the DDR pin to SV
reference voltage and tracking output voltage between
channels are possible. See the Output Voltage Tracking
and External Reference Input sections.
Soft-Start
The RUN pin provides a means to shut down the LTC3612.
Tying the RUN pin to SGND places the LTC3612 in a low
quiescent current shutdown state (I
When the LTC3612 is enabled by pulling the RUN pin high,
the chip enters a soft start-up state. The type of soft start-
up behavior is set by the TRACK/SS pin:
1. Tying TRACK/SS to SV
2. If a longer soft-start period is desired, it can be set ex-
circuit. This circuit ramps the output voltage to the fi nal
value within 1ms.
ternally with a resistor and capacitor on the TRACK/SS
pin as shown in Figure 1. The TRACK/SS pin reduces the
IN
selects the internal soft-start
Q
< 1μA).
IN
, lower external
3612f