ltc4264cde-trpbf Linear Technology Corporation, ltc4264cde-trpbf Datasheet - Page 8

• Manufacturer Part Number: ltc4264cde-trpbf
• Description: High Power Pd Interface Controller With 750ma Current Limit
• Manufacturer: Linear Technology Corporation

APPLICATIONS INFORMATION
LTC4264
The LTC4264 is specifi cally designed to implement the
front end of a high power PD for power-hungry PoE ap-
plications that must operate beyond the power limits of
IEEE 802.3af. LTC4264 uses a precision, dual current limit
that keeps inrush below IEEE 803.2af levels to ensure
interoperability with any PSE. After inrush is complete,
the LTC4264 input current limit switches to the I
level, using an onboard, 750mA power MOSFET. This al-
lows a PD (supplied by a custom PSE) to deliver power
above the IEEE 802.3af 12.95W maximum, sending up
to 35W to the PD load. The LTC4264 uses established
IEEE 802.3af detection and classifi cation methods to
maintain compliance and includes an extended program-
mable Class 5 range for use in custom PoE applications.
The LTC4264 features both active-high and active-low
power good signaling for simplifi ed interface to any DC/DC
converter. The SHDN pin on the LTC4264 can be used to
provide a seamless interface for external wall adapter or
other auxiliary power options. The I
option to remove the high current limit, I
LTC4264 includes an onboard signature resistor, precision
UVLO, thermal overload protection and is available in a
thermally-enhanced 12-lead 4mm × 3mm DFN package
for superior high current performance.
8
3.3V
–54V
–54V
GND
GND
V
AUTO
DGND BYP
V
V
DD
EE
EE
0.25Ω
0.25Ω
SENSE GATE OUT
SENSE GATE OUT
LTC4259A
LTC4259A
AGND
1/4
1/4
IRLR3410
IRLR3410
0.1µF
DETECT
DETECT
AGND
10k
10k
CMPD3003
CMPD3003
S1B
S1B
PSE
1k
1k
0.1µF
0.1µF
Figure 2. 4-Pair High Power PoE Gigabit Ethernet System Diagram
0.47µF
0.47µF
LIM_EN
SMAJ58A
SMAJ58A
Rx1
Rx2
Tx1
Tx2
pin provides the
LIMIT_HIGH
LIMIT_HIGH
1
2
3
6
4
5
7
8
RJ45
. The
CAT5
OPERATION
The LTC4264 high power PD interface controller has sev-
eral modes of operation depending on the applied input
voltage as shown in Figure 3 and summarized in Table 1.
These various modes satisfy the requirements defi ned
in the IEEE 802.3af specifi cation. The input voltage is
applied to the V
is always negative.
Table 1. LTC4264 Operational Mode as a Function
of Input Voltage
INPUT VOLTAGE
0V to –1.4V
–1.5V to –10.1V
–10.3V to –12.4V
–12.5V to UVLO*
UVLO* to –57V
*UVLO includes hysteresis.
RJ45
Rising input threshold ≅ –38.9V
Falling input threshold ≅ –30.6V
1
2
4
5
3
6
7
8
Rx1
Tx1
Rx2
Tx2
DF1501S
DF1501S
IN
LTC4264 MODE OF OPERATION
Inactive
25k Signature Resistor Detection
Classifi cation Load Current Ramps Up from 0% to
100%
Classifi cation Load Current Active
Power Applied to PD Load
0.1µF
0.1µF
pin with reference to the GND pin and
SMAJ58A
SMAJ58A
PD
R
V
R
V
IN
IN
CLASS
CLASS
LTC4264
LTC4264
GND
GND
PWRGD
PWRGD
V
V
OUT
OUT
MIN
MIN
5µF
5µF
CONVERTER
CONVERTER
DC/DC
DC/DC
–
+
+
–
V
4264f
OUT
4264 F02
+
–