ltc6992-2-ltc6992-3 Linear Technology Corporation, ltc6992-2-ltc6992-3 Datasheet - Page 16

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ltc6992-2-ltc6992-3

Manufacturer Part Number
ltc6992-2-ltc6992-3
Description
Timerblox Voltage-controlled Pulse Width Modulator Pwm
Manufacturer
Linear Technology Corporation
Datasheet
OPERATION
LTC6992-1/LTC6992-2/
LTC6992-3/LTC6992-4
Pulse Width (Duty Cycle) Modulation
The MOD pin is a high impedance analog input providing
direct control of the output duty cycle. The duty cycle is
proportional to the voltage applied to the MOD pin, V
The PWM duty cycle accuracy ∆D specifies that the above
equation is valid to within ±4.5% for V
V
Since V
approximated by the following equation.
The V
Driving V
have no further affect on the duty cycle.
Duty Cycle Limits
The only difference between the four versions of the
LTC6992 is the limits, or clamps, placed on the output
duty cycle. The LTC6992-1 generates output duty cycles
ranging from 0% to 100%. At 0% or 100% the output
will stop oscillating and rest at GND or V
The LTC6992-2 will never stop oscillating, regardless of
the V
cycle to a 5% to 95% range (1% to 99% guaranteed).
Therefore, its V
V
The LTC6992-3 and LTC6992-4 complete the family by
providing one-sided clamping. The LTC6992-3 allows
0% to 95% duty cycle, and the LTC6992-4 allows 5% to
100% duty cycle.
16
SET
SET
Duty Cycle = D =
Duty Cycle = D ≅
and 0.8 • V
(approximately 0.14V to 0.86V).
MOD
MOD
SET
MOD
level. Internal clamping circuits limit its duty
control range is approximately 0.1V to 0.9V.
= 1V ±30mV, the duty cycle equation may be
beyond that range (towards GND or V
MOD
SET
(12.5% to 87.5% duty cycle).
control range is 0.14 • V
0.8 • V
V
MOD
V
MOD
800mV
− 100mV
SET
8
1
MOD
+
, respectively.
between 0.2 •
SET
to 0.86 •
+
MOD
) will
.
Output Polarity (POL Bit)
The duty cycle equation describes a proportional transfer
function, where duty cycle increases as V
The LTC6992 includes a POL bit (determined by the
DIVCODE as described earlier) that inverts the output
signal. This makes the duty cycle gain negative, reducing
duty cycle as V
POL = 0
POL = 1
OUT
OUT
Figure 3. POL Bit Functionality
MOD
D• t
increases.
OUT
t
OUT
D •t
OUT
t
OUT
D 1
D
0.8 • V
0.8 • V
V
V
MOD
MOD
MOD
SET
SET
6992 F03
increases.
1
8
8
1
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