mg84fl54 Megawin Technology, mg84fl54 Datasheet - Page 47

• Manufacturer Part Number: mg84fl54
• Description: Full-speed Usb Micro-controller
• Manufacturer: Megawin Technology

Table 12-1 Timer 1 Baud Rate setting example in SYSCLK=12MHz
Using Timer 2 as the Baud Rate Generator
When Timer 2 is used as the baud rate generator (either TCLK or RCLK in T2CON is ‘1’), the baud rate is as
follows.
Note:
Table 12-2 Timer 2 Baud Rate setting example in SYSCLK=12MHz
12.8. Serial Port Register
All the four operation modes of the serial port are the same as those of the standard 8051 except the baud rate
setting. Three registers, PCON, AUXR and AUXR2, are related to the baud rate setting:
SCON (Address=98H, Serial Port Control Register)
SM0/FE: Serial Port Mode bit 0 (when SMOD0=0)/ Frame Error bit (when SMOD0=1).
When SMOD0=1, this bit is set by the receiver when an invalid stop bit is detected. The FE bit is not cleared by
valid frames but should be cleared by firmware. The SMOD0 bit (in PCON register) must be ‘1’ to enable access
to the FE bit.
When SMOD0=0, this bit is combined with SM1 to decide Serial Port Mode.
SM1: Serial Port Mode Bit 1.
MEGAWIN
Mode 1, 3 Baud Rate =
SM0/FE
Baud Rate
Baud Rate
7
(1) If BRADJ=0, the baud rate formula is as same as standard 8051.
115200
115200
14400
19200
28800
38400
57600
14400
19200
28800
38400
57600
2400
4800
7200
9600
2400
4800
7200
9600
Where, the deviation to the standard 115200 bps is +0.16%, which is acceptable in an UART
communication.
Baud Rate = (2/16) x 12MHz / (256-243) = 115385 bps.
SM1
6
SYSCLK
SYSCLK
12 MHz
12 MHz
12 MHz
12 MHz
12 MHz
12 MHz
12 MHz
12 MHz
12 MHz
12 MHz
12 MHz
12 MHz
12 MHz
12 MHz
12 MHz
12 MHz
12 MHz
12 MHz
12 MHz
12 MHz
n x (65536 – (RCAP2H, RCAP2L))
SM2
5
SMOD
SMOD
SYSCLK Frequency
0
0
0
0
0
1
0
1
1
1
x
x
x
x
x
x
x
x
x
x
REN
4
BRADJ
BRADJ
MG84FL54B Data sheet
0
0
0
0
0
0
0
1
0
1
0
0
0
0
0
1
0
0
1
1
TB8
3
T1X12
T1X12
0
1
1
1
1
1
1
1
1
1
x
x
x
x
x
x
x
x
x
x
; n=32, if BRADJ=0
; n=16, if BRADJ=1
RB8
2
(RCAP2H,RCAP2L)
65380
65458
65484
65497
65510
65497
65523
65526
65523
TH1
243
178
204
217
230
217
243
217
243
243
N/A
TI
1
RI
0
0.1604%
0.1604%
0.1604%
0.1604%
0.1604%
0.1604%
0.1604%
0.1604%
0.1604%
0.1604%
0.1604%
0.1604%
0.1604%
0.1604%
0.1604%
0.1604%
0.1604%
2.3439%
0.1604%
Error
Error
N/A
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