s29al016j Meet Spansion Inc., s29al016j Datasheet - Page 35

• Manufacturer Part Number: s29al016j
• Description: 16 Megabit 2 M X 8-bit/1 M X 16-bit Cmos 3.0 Volt-only Boot Sector Flash Memory
• Manufacturer: Meet Spansion Inc.

11.3
11.4
May 23, 2008 S29AL016J_00_05
DQ6: Toggle Bit I
DQ2: Toggle Bit II
Toggle Bit I on DQ6 indicates whether an Embedded Program or Erase algorithm is in progress or complete,
or whether the device has entered the Erase Suspend mode. Toggle Bit I may be read at any address, and is
valid after the rising edge of the final WE# pulse in the command sequence (prior to the program or erase
operation), and during the sector erase time-out.
During an Embedded Program or Erase algorithm operation, successive read cycles to any address cause
DQ6 to toggle. (The system may use either OE# or CE# to control the read cycles.) When the operation is
complete, DQ6 stops toggling.
After an erase command sequence is written, if all sectors selected for erasing are protected, DQ6 toggles for
approximately 100 µs, then returns to reading array data. If not all selected sectors are protected, the
Embedded Erase algorithm erases the unprotected sectors, and ignores the selected sectors that are
protected.
The system can use DQ6 and DQ2 together to determine whether a sector is actively erasing or is erase-
suspended. When the device is actively erasing (that is, the Embedded Erase algorithm is in progress), DQ6
toggles. When the device enters the Erase Suspend mode, DQ6 stops toggling. However, the system must
also use DQ2 to determine which sectors are erasing or erase-suspended. Alternatively, the system can use
DQ7 (see
If a program address falls within a protected sector, DQ6 toggles for approximately 1 µs after the program
command sequence is written, then returns to reading array data.
DQ6 also toggles during the erase-suspend-program mode, and stops toggling once the Embedded Program
algorithm is complete.
Table 11.1 on page 37
bit algorithm in flowchart form, and
Figure 17.9 on page 47
between DQ2 and DQ6 in graphical form. See also the subsection on
The “Toggle Bit II” on DQ2, when used with DQ6, indicates whether a particular sector is actively erasing (that
is, the Embedded Erase algorithm is in progress), or whether that sector is erase-suspended. Toggle Bit II is
valid after the rising edge of the final WE# pulse in the command sequence.
DQ2 toggles when the system reads at addresses within those sectors that have been selected for erasure.
(The system may use either OE# or CE# to control the read cycles.) But DQ2 cannot distinguish whether the
sector is actively erasing or is erase-suspended. DQ6, by comparison, indicates whether the device is
actively erasing, or is in Erase Suspend, but cannot distinguish which sectors are selected for erasure. Thus,
both status bits are required for sector and mode information. Refer to
outputs for DQ2 and DQ6.
Figure 11.2 on page 36
DQ6/DQ2 on page 36
Figure 17.9 on page 47
between DQ2 and DQ6 in graphical form.
D a t a
DQ7: Data# Polling on page
S h e e t
explains the algorithm. See also the
shows the outputs for Toggle Bit I on DQ6.
shows the toggle bit timing diagrams.
shows the toggle bit algorithm in flowchart form, and the section
shows the toggle bit timing diagram.
( A d v a n c e
Reading Toggle Bits DQ6/DQ2 on page 36
33).
S29AL016J
I n f o r m a t i o n )
DQ6: Toggle Bit I on page 35
Figure 17.10 on page 47
Figure 17.10 on page 47
Figure 11.2 on page 36
DQ2: Toggle Bit II on page
Table 11.1 on page 37
explains the algorithm.
shows the differences
shows the differences
Reading Toggle Bits
subsection.
shows the toggle
to compare
35.
35