z16017 ZiLOG Semiconductor, z16017 Datasheet - Page 18
z16017
Manufacturer Part Number
z16017
Description
Pcmcia Interface Solution
Manufacturer
ZiLOG Semiconductor
Datasheet
1.Z16017.pdf
(138 pages)
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4
PS012002-1201
Z86017/Z16017 PCMCIA Interface Solution
Product Specification
use the physical PCMCIA 68-pin connector but do not support PCMCIA
protocol. If this pin is held High (PC_ATA/HOE), the device is placed
into the PCMCIA mode. The override bits in register
mode(s) the user can support.
Serial Port Operation (Master) Mode
After the ZX6017 determines that an external EEPROM is present (see
Figure
The ZX6017 internal sequencer starts up and reads EEPROM address
1eh
data is considered to be valid. After that, the internal sequencer resets its
address counter back to zero. Data from EEPROM’s addresses [00-2F] is
read out and put into the on-board registers of the ZX6017. The EEPROM
sequencer then reads EEPROM addresses
moved into the ZX6017 on-board attribute memory addresses
After loading the registers and attribute memory, the sequencer completes
by clearing the Ready/Busy pin on the PCMCIA interface indicating 1
“Ready.” If EEPROM address
sequencer stops. The PCMCIA Ready/Busy pin stays in the Busy state,
the on-board registers of the ZX6017 remain in their default state, and
attribute memory data is unknown. The user can program the off-board
EEPROM through the PCMCIA interface by means of three special
registers and ignore Busy.
. If EEPROM address
2), the Ready/Busy pin on the PCMCIA interface is set to Busy.
1Eh
1Eh
is loaded with a
does not contain
30h
PCMCIA Interface Overview
to
1Ch
FFh
then the EEPROM’s
1Ch
00H
and each byte is
, then the
determine what
00
-
CFh
.
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