mt48h16m16lfbf-75 Micron Semiconductor Products, mt48h16m16lfbf-75 Datasheet - Page 53

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mt48h16m16lfbf-75

Manufacturer Part Number
mt48h16m16lfbf-75
Description
256mb X16, X32 Mobile Sdram
Manufacturer
Micron Semiconductor Products
Datasheet

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PDF:09005aef8219eeeb/Source: 09005aef8219eedd
256mb_x16_sdram_y36m_1.fm - Rev G 2/08 EN
22. V
23. The clock frequency can only be changed during clock stop, power-down, or while in
24. Auto precharge mode only. The precharge timing budget (
25. Parameter guaranteed by design.
26. CKE is HIGH during refresh command period
27. The I
28. Values for I
29. Deep power-down current is a nominal value at 25°C. This parameter is not tested.
30. Test conditions include 500ms delay prior to measurement.
31. Auto precharge mode only. The precharge timing budget (
cannot be greater than one third of the cycle rate. V
a pulse width ≤ 3ns.
a self-refresh mode.
after the first clock delay, after the last WRITE is executed. May not exceed limit set for
precharge mode.The clock frequency can only be changed during
only. Values for I
and 7ns for -8 after the first clock delay, after the last WRITE is executed. For auto pre-
charge mode, at least one clock cycle is required during
IH
overshoot: V
DD
6 limit is actually a nominal value and does not result in a fail value.
DD
7 for 70°C, 45°C, 15°C, and I
DD
IH
(MAX) = V
7 4-bank, 2-bank, and 1-bank for 85°C are 100 percent tested.
53
DD
Q + 2V for a pulse width ≤ 3ns, and the pulse width
Micron Technology, Inc., reserves the right to change products or specifications without notice.
DD
256Mb: x16, x32 Mobile SDRAM
7 1/2-bank and 1/4-bank are sampled
t
RFC (MIN) else CKE is LOW.
IL
undershoot: V
t
WR.
t
t
RP) begins at 7ns for -8
RP) begins at 7.5ns for -75
©2006 Micron Technology, Inc. All rights reserved
IL
(MIN) = –2V for
Notes

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