mt48h16m32lfcm-75-it Micron Semiconductor Products, mt48h16m32lfcm-75-it Datasheet - Page 27
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mt48h16m32lfcm-75-it
Manufacturer Part Number
mt48h16m32lfcm-75-it
Description
512mb 32 Meg X 16, 16 Meg X 32 Mobile Sdram Features
Manufacturer
Micron Semiconductor Products
Datasheet
1.MT48H16M32LFCM-75-IT.pdf
(75 pages)
- Current page: 27 of 75
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Figure 10:
WRITE
PDF: 09005aef82ea3742/Source: 09005aef82ea3752
sdr_mobile_sdram_cmd_op_timing_dia_fr4.08__4.fm - Rev. B 4/08 EN
READ Command
Notes:
accesses. Read data appears on the DQs subject to the logic level on the DQM inputs two
clocks earlier. If a given DQM signal was registered HIGH, the corresponding DQs will be
High-Z two clocks later; if the DQM signal was registered LOW, the DQs will provide valid
data. Figure 10 shows the READ command.
1. EN AP = enable auto precharge, DIS AP = disable auto precharge
The WRITE command is used to initiate a burst write access to an active row. The value
on the BA0, BA1 inputs selects the bank, and the address provided selects the starting
column location. The value on input A10 determines whether or not auto precharge is
used. If auto precharge is selected, the row being accessed is precharged at the end of the
write burst; if auto precharge is not selected, the row remains open for subsequent
accesses. Input data appearing on the DQs is written to the memory array subject to the
DQM input logic level appearing coincident with the data. If a given DQM signal is regis-
tered LOW, the corresponding data is written to memory; if the DQM signal is registered
HIGH, the corresponding data inputs are ignored and a write is not executed to that
byte/column location. Figure 11 shows the WRITE command.
BA0, BA1
Address
RAS#
CAS#
A10
WE#
CKE
CLK
CS#
1
HIGH
Column
address
address
DIS AP
EN AP
Bank
27
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©2007 Micron Technology, Inc. All rights reserved.
SDR Mobile SDRAM
Commands
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