mt48h16m32lfcm-75-it Micron Semiconductor Products, mt48h16m32lfcm-75-it Datasheet - Page 38
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mt48h16m32lfcm-75-it
Manufacturer Part Number
mt48h16m32lfcm-75-it
Description
512mb 32 Meg X 16, 16 Meg X 32 Mobile Sdram Features
Manufacturer
Micron Semiconductor Products
Datasheet
1.MT48H16M32LFCM-75-IT.pdf
(75 pages)
- Current page: 38 of 75
- Download datasheet (2Mb)
Burst Length (BL)
Burst Type
Table 19:
PDF: 09005aef82ea3742/Source: 09005aef82ea3752
sdr_mobile_sdram_cmd_op_timing_dia_fr4.08__4.fm - Rev. B 4/08 EN
Continuous
Length
Burst
2
4
8
Burst Definition Table
Starting Column Address
n = A0–An/9/8 (location 0–y)
A2
0
0
0
0
1
1
1
1
Read and write accesses to the SDRAM are burst oriented, with the BL being program-
mable, as shown in Figure 14 on page 37. The BL determines the maximum number of
column locations that can be accessed for a given READ or WRITE command. Burst
length of 1, 2, 4, 8, or continuous locations are available for both the sequential and the
interleaved burst types, and a continuous page burst is available for the sequential type.
The continuous page burst is used in conjunction with the BURST TERMINATE
command to generate arbitrary BLs.
Reserved states should not be used, as unknown operation or incompatibility with
future versions may result.
When a READ or WRITE command is issued, a block of columns equal to the BL is effec-
tively selected. All accesses for that burst take place within this block, meaning that the
burst wraps within the block if a boundary is reached. The block is uniquely selected by
A1–A8 when BL = 2, A2–A8 when BL = 4, and A3–A8 when BL = 8. The remaining (least
significant) address bit(s) is (are) used to select the starting location within the block.
Continuous page burst wraps within the page if the boundary is reached.
Accesses within a given burst may be programmed to be either sequential or interleaved;
this is referred to as the burst type and is selected via bit M3.
The ordering of accesses within a burst is determined by the BL, the burst type, and the
starting column address, as shown in Table 19.
A1
A1
0
0
1
1
0
0
1
1
0
0
1
1
A0
A0
A0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Type = Sequential
Cn + 3...Cn - 1, Cn...
Cn, Cn + 1, Cn + 2,
38
0-1-2-3-4-5-6-7
1-2-3-4-5-6-7-0
2-3-4-5-6-7-0-1
3-4-5-6-7-0-1-2
4-5-6-7-0-1-2-3
5-6-7-0-1-2-3-4
6-7-0-1-2-3-4-5
7-0-1-2-3-4-5-6
0-1-2-3
1-2-3-0
2-3-0-1
3-0-1-2
0-1
1-0
Order of Accesses Within a Burst
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Type = Interleaved
©2007 Micron Technology, Inc. All rights reserved.
SDR Mobile SDRAM
0-1-2-3-4-5-6-7
1-0-3-2-5-4-7-6
2-3-0-1-6-7-4-5
3-2-1-0-7-6-5-4
4-5-6-7-0-1-2-3
5-4-7-6-1-0-3-2
6-7-4-5-2-3-0-1
7-6-5-4-3-2-1-0
Not supported
0-1-2-3
1-0-3-2
2-3-0-1
3-2-1-0
0-1
1-0
Operations
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