ics8512061i Integrated Device Technology, ics8512061i Datasheet - Page 13

• Manufacturer Part Number: ics8512061i
• Description: Single Channel 0.7v Differential- To-lvttl Transceiver
• Manufacturer: Integrated Device Technology

Power Considerations (LVCMOS Outputs)
This section provides information on power dissipation and junction temperature for the ICS8512061I.
Equations and example calculations are also provided.
1.
The total power dissipation for the ICS8512061I is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
Dynamic Power Dissipation at 250MHz
Total Power
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the device.
The maximum recommended junction temperature for HiPerClockS devices is 125°C.
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θ
and a multi-layer board, the appropriate value is 129.5°C/W per Table 5B below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type
of board (single layer or multi-layer).
Table 5B. Thermal Resistance
IDT™ / ICS™ TRANSCEIVER
Meters per Second
Multi-Layer PCB, JEDEC Standard Test Boards
ICS8512061I
SINGLE CHANNEL 0.7V DIFFERENTIAL-TO-LVTTL TRANSCEIVER
Power Dissipation.
•
•
•
85°C + 0.111W *129.5°C/W = 99.4°C. This is well below the limit of 125°C.
Power (core)
Output Impedance R
Output Current I
Power Dissipation on the R
Power (R
Power (250MHz) = C
= Power (core)
= 72mW + 13.2mW + 25.9mW
= 111.1mW
The equation for Tj is as follows: Tj = θ
Tj = Junction Temperature
θ
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
JA
A
= Ambient Temperature
= Junction-to-Ambient Thermal Resistance
OUT
MAX
) = R
MAX
OUT
= V
OUT
+ Power (R
= V
DD_MAX
OUT
PD
* (I
DD_MAX
* Frequency * (V
Power Dissipation due to Loading 50Ω to V
OUT
OUT
θ
JA
* I
)
2
DD_MAX
OUT
for 8 Lead TSSOP, Forced Convection
per LVCMOS output
= 20Ω * (25.7mA)
/ [2 * (50Ω + R
DD
) + Power (250MHz)
= 3.3V + 0.3V = 3.6V, which gives worst case results.
JA
= 3.6V *20mA = 72mW
DD
* Pd_total + T
)
2
= 8pF * 250MHz * (3.6V)
OUT
2
)] = 3.6V / [2 * (50Ω + 20Ω)] = 25.7mA
= 13.2mW per output
θ
129.5°C/W
JA
A
by Velocity
0
13
DD
2
/2
= 25.9mW per output
125.5
1
ICS8512061AGI REV. B NOVEMBER 19, 2008
JA
must be used. Assuming no air flow
123.5
2.5