ics8512061i Integrated Device Technology, ics8512061i Datasheet - Page 4

• Manufacturer Part Number: ics8512061i
• Description: Single Channel 0.7v Differential- To-lvttl Transceiver
• Manufacturer: Integrated Device Technology

Table 4B. HCSL (QA/nQA) AC Characteristics, V
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the
device is mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after
thermal equilibrium has been reached under these conditions.
NOTE 1: Measured from V
NOTE 2: Measurement taken from differential waveform.
NOTE 3: Measurement from -150mV to +150mV on the differential waveform (derived from QA minus nQA). The signal must be
monotonic through the measurement region for rise and fall time. The 300mV measurement window is centered on the differential zero
crossing.
NOTE 4: T
is allowed to drop back into the V
NOTE 5: Measurement taken from single-ended waveform.
NOTE 6: Defined as the maximum instantaneous voltage including overshoot. See Parameter Measurement Information Section.
NOTE 7: Defined as the minimum instantaneous voltage including undershoot. See Parameter Measurement Information Section.
NOTE 8: Measured at crossing point where the instantaneous voltage value of the rising edge of QA equals the Falling edge of nQA.
See Parameter Measurement Information Section
NOTE 9: Refers to the total variation from the lowest crossing point to the highest, regardless of which edge is crossing. Refers to all
crossing points for this measurement. See Parameter Measurement Information Section.
NOTE 10: Defined as the total variation of all crossing voltage of Rising QA and Falling nQA. This is the maximum allowed variance in the
V
NOTE 11: Input duty cycle must be 50%.
IDT™ / ICS™ TRANSCEIVER
Parameter
f
tjit
t
Rise
Edge Rate
Fall
Edge Rate
V
V
V
V
∆V
odc
CROSS
MAX
PD
ICS8512061I
SINGLE CHANNEL 0.7V DIFFERENTIAL-TO-LVTTL TRANSCEIVER
rb
MAX
MIN
CROSS
CROSS
for any particular system. See Parameter Measurement Information Section.
STABLE
Symbol
Output Frequency
Buffer Additive Phase Jitter, RMS
Propagation Delay, NOTE 1
Rising Edge Rate; NOTE 2, 3
Falling Edge Rate; NOTE 2, 3
Ringback Voltage; NOTE 2, 4
Absolute Max Output Voltage;
NOTE 5, 6
Absolute Min Output Voltage;
NOTE 5, 7
Absolute Crossing Voltage;
NOTE 5, 8, 9
Total Variation of V
edges; NOTE 5, 8, 10
Output Duty Cycle; NOTE 11
is the time the differential clock must maintain a minimum ±150mV differential voltage after rising/falling edges before it
DD
/2 input cross point to the differential output crossing point.
RB
CROSS
±100 differential range. See Parameter Measurement Information Section.
over all
100MHz, Integration Range:
DD
= 3.3V ± 0.3V, T
Test Conditions
12kHz – 20MHz
IN to QA/nQA
4
A
= -40°C to 85°C
Minimum
-100
-300
ICS8512061AGI REV. B NOVEMBER 19, 2008
250
1.1
0.6
0.6
45
Typical
0.29
Maximum
1150
250
100
550
140
1.7
4.0
4.0
55
Units
MHz
V/ns
V/ns
mV
mV
mV
mV
ps
ns
%
V