ics87946-01 ETC-unknow, ics87946-01 Datasheet - Page 10

• Manufacturer Part Number: ics87946-01
• Description: Lvpecl-to-lvcmos/lvttl Clock Generator
• Manufacturer: ETC-unknow

Figure 8 shows how the differential input can be wired to accept single ended levels. The reference voltage V_REF = V
generated by the bias resistors R1, R2 and C1. This bias circuit should be located as close as possible to the input pin. The ratio of
R1 and R2 might need to be adjusted to position the V_REF in the center of the input voltage swing. For example, if the input clock
swing is only 2.5V and V
87946AY-01
W
IRING THE
DD
= 3.3V, V_REF should be 1.25V and R2/R1 = 0.609.
F
IGURE
D
IFFERENTIAL
8 - S
A
CLK_IN
PPLICATION
www.icst.com/products/hiperclocks.html
INGLE
PRELIMINARY
0.1uF
C1
E
NDED
LVPECL-
I
NPUT TO
S
IGNAL
R1
1K
V_REF
R2
1K
10
I
NFORMATION
A
D
V
TO
RIVING
CCEPT
DD
+
-
-LVCMOS/LVTTL C
D
IFFERENTIAL
S
INGLE
E
I
NPUT
NDED
ICS87946-01
L
L
EVELS
OW
LOCK
S
REV. A JANUARY 2, 2002
KEW
G
ENERATOR
÷1, ÷2
DD
/2 is