ics87951-147 Integrated Device Technology, ics87951-147 Datasheet
ics87951-147
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ics87951-147 Summary of contents
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... The CLK1, nCLK1 pair can accept most standard differential input levels. With output frequencies up to 180MHz, the ICS87951I-147 is targeted for high performance clock appli- cations. Along with a fully integrated PLL, the ICS87951I-147 contains frequency configurable outputs and an external feed- back input for regenerating clocks with “zero delay”. ...
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... EXT_FB Internal Pulldown DIV_SELB Internal Pulldown DIV_SELC Internal Pulldown MR/nOE Internal Pulldown DIV_SELD 87951AYI-147 D - -LVCMOS/LVTTL Z IFFERENTIAL PHASE VCO DETECTOR 250-500MHz LPF POWER-ON RESET www.icst.com/products/hiperclocks.html 2 ICS87951I-147 KEW D ERO ELAY ÷ ÷ ÷ QC0 0 QC1 1 QD0 QD1 ...
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... www.icst.com/products/hiperclocks.html 3 ICS87951I-147 KEW D ERO ELAY ...
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... www.icst.com/products/hiperclocks.html 4 ICS87951I-147 KEW D ERO ELAY F T NPUT UNCTION ABLE ...
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... www.icst.com/products/hiperclocks.html 5 ICS87951I-147 KEW D ERO ELAY = -40°C 85° ...
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... 2.5V±5%, T DDA DDO www.icst.com/products/hiperclocks.html 6 ICS87951I-147 KEW D ERO ELAY = -40°C 85° ...
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... www.icst.com/products/hiperclocks.html 7 ICS87951I-147 KEW D ERO ELAY ...
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... Outputs t cycle n UTPUT nCLK1 CLK0, CLK1 EXT_FB x 100% (where t (Ø) is any random sample, and t (Ø) of the sampled cycles measured on controlled edges ERIOD HASE ITTER AND www.icst.com/products/hiperclocks.html 8 ICS87951I-147 KEW D ERO ELAY I NFORMATION SCOPE OAD EST IRCUIT V DDO ...
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... UPPLY ILTERING ECHNIQUES As in any high speed analog circuitry, the power supply pins are vulnerable to random noise. The ICS87951I-147 provides separate power supplies to isolate any high switching noise from the outputs to the internal PLL. V should be individually connected to the power supply plane through vias, and bypass capacitors should be used for each pin ...
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... 3B. H NPUT RIVEN BY IGURE RIVER 3.3V 3.3V R4 125 LVDS_Driv er CLK nCLK HiPerClockS Input 3D. H NPUT RIVEN BY IGURE www.icst.com/products/hiperclocks.html 10 ICS87951I-147 KEW D ERO ELAY 3. Ohm CLK Ohm nCLK HiPerClockS Input CLK/nCLK ...
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... Single-Layer PCB, JEDEC Standard Test Boards Multi-Layer PCB, JEDEC Standard Test Boards NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs RANSISTOR OUNT The transistor count for ICS87951I-147 is: 2674 Pin compatible with the MPC951 87951AYI-147 D - -LVCMOS/LVTTL Z IFFERENTIAL ...
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... ° www.icst.com/products/hiperclocks.html 12 ICS87951I-147 ERO ELAY ...
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... L " " " " www.icst.com/products/hiperclocks.html 13 ICS87951I-147 KEW D ERO ELAY ° ...
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... www.icst.com/products/hiperclocks.html 14 ICS87951I-147 KEW D ERO ELAY REV. A JUNE 14, 2005 ...