ics87951-147 Integrated Device Technology, ics87951-147 Datasheet - Page 10

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ics87951-147

Manufacturer Part Number
ics87951-147
Description
Differential Or Lvcmos-input Lvcmos-output 2 9 250-mhz Clock Generator
Manufacturer
Integrated Device Technology
Datasheet
F
F
D
The CLK /nCLK accepts LVDS, LVPECL, LVHSTL, SSTL, HCSL
and other differential signals. Both V
V
face examples for the HiPerClockS CLK/nCLK input driven by
the most common driver types. The input interfaces suggested
87951AYI-147
IGURE
PP
IGURE
IFFERENTIAL
and V
3.3V
3C. H
3A. H
1.8V
CMR
LVPECL
input requirements. Figures 3A to 3D show inter-
LVHSTL
ICS
HiPerClockS
LVHSTL Driver
3.3V LVPECL D
ICS H
I
I
P
P
Integrated
Circuit
Systems, Inc.
C
ER
ER
Zo = 50 Ohm
Zo = 50 Ohm
LOCK
C
Zo = 50 Ohm
Zo = 50 Ohm
C
I
P
LOCK
LOCK
ER
C
I
S CLK/nCLK I
NPUT
S CLK/nCLK I
LOCK
RIVER
S LVHSTL D
R1
50
3.3V
R3
125
I
R1
84
NTERFACE
SWING
R2
50
R4
125
R2
84
and V
CLK
nCLK
NPUT
NPUT
CLK
nCLK
3.3V
www.icst.com/products/hiperclocks.html
D
OH
3.3V
RIVER
HiPerClockS
Input
IFFERENTIAL
must meet the
HiPerClockS
Input
D
D
RIVEN BY
RIVEN BY
10
-
TO
here are examples only. Please consult with the vendor of the
driver component to confirm the driver termination requirements.
For example in Figure 3A, the input termination applies for ICS
HiPerClockS LVHSTL drivers. If you are using an LVHSTL driver
from another vendor, use their termination recommendation.
F
F
IGURE
IGURE
-LVCMOS/LVTTL Z
3.3V
3.3V
3D. H
LVDS_Driv er
3B. H
LVPECL
3.3V LVPECL D
3.3V LVDS D
I
I
P
P
Zo = 50 Ohm
Zo = 50 Ohm
ER
ER
C
C
LOCK
LOCK
Zo = 50 Ohm
Zo = 50 Ohm
S CLK/nCLK I
S CLK/nCLK I
RIVER
ICS87951I-147
R1
50
RIVER
R3
50
ERO
L
R2
50
OW
R1
100
CLK
nCLK
D
3.3V
S
NPUT
NPUT
ELAY
HiPerClockS
KEW
REV. A JUNE 14, 2005
Input
CLK
nCLK
D
D
3.3V
, 1-
B
RIVEN BY
RIVEN BY
Receiv er
UFFER
TO
-9

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