54f374 National Semiconductor Corporation, 54f374 Datasheet - Page 2

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54f374

Manufacturer Part Number
54f374
Description
Octal D-type Flip-flop With Tri-state Outputs
Manufacturer
National Semiconductor Corporation
Datasheet

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Unit Loading Fan Out
Functional Description
The ’F374 consists of eight edge-triggered flip-flops with in-
dividual D-type inputs and TRI-STATE true outputs The
buffered clock and buffered Output Enable are common to
all flip-flops The eight flip-flops will store the state of their
individual D inputs that meet the setup and hold time re-
quirements on the LOW-to-HIGH Clock (CP) transition With
the Output Enable (OE) LOW the contents of the eight flip-
flops are available at the outputs When the OE is HIGH the
outputs go to the high impedance state Operation of the
OE input does not affected the state of the flip-flops
Logic Diagram
Names
D
CP
OE
O
0
0
Pin
–D
–O
7
7
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays
Data Inputs
Clock Pulse Input (Active Rising Edge)
TRI-STATE Output Enable Input (Active LOW)
TRI-STATE Outputs
Description
150 40 (33 3)
HIGH LOW
1 0 1 0
1 0 1 0
1 0 1 0
U L
2
Truth Table
H
L
X
Z
e
e
e
e
D
e
H
X
L
LOW Voltage Level
High Impedance
HIGH Voltage Level
Immaterial
n
54F 74F
LOW-to-HIGH Clock Transition
b
3 mA 24 mA (20 mA)
20 A
20 A
20 A
Output I
Inputs
Input I
CP
X
b
b
b
IH
OH
0 6 mA
0 6 mA
0 6 mA
I
IL
I
OE
OL
H
L
L
Register
Internal
H
L
X
Output
TL F 9524– 5
O
H
L
Z
n

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