mpc9893 Integrated Device Technology, mpc9893 Datasheet - Page 4

• Manufacturer Part Number: mpc9893
• Description: 3.3v 1 12 Lvcmos Pll Clock Generator
• Manufacturer: Integrated Device Technology

IDT™ / ICS™ 3.3V 1:12 LVCMOS PLL CLOCK GENERATOR
MPC9893
3.3V 1:12 LVCMOS PLL CLOCK GENERATOR
Table 3. Clock Frequency Configuration
Table 4. General Specifications
Table 5. Absolute Maximum Ratings
1. FB: Internal PLL feedback divider
1. Absolute maximum continuous ratings are those maximum values beyond which damage to the device may occur. Exposure to these
Symbol
Symbol
M22M
M12M
Name
M22H
M12H
M12L
M2M
M1M
M2H
M1H
M82
M42
M32
M1L
CDM
V
M8
M4
M3
HBM
I
C
V
V
MM
C
V
OUT
LU
I
T
conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation at absolute-maximum-rated
conditions is not implied.
OUT
CC
IN
TT
PD
IN
IN
S
FSEL0
Output Termination Voltage
ESD Protection (Machine Model)
ESD Protection (Human Body Model)
ESD Protection (Charged Device Model)
Latch-Up Immunity
Power Dissipation Capacitance
Input Capacitance
Supply Voltage
DC Input Voltage
DC Output Voltage
DC Input Current
DC Output Current
Storage Temperature
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
FSEL1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
Characteristics
FSEL2
Characteristics
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
FSEL3 f
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
(1)
REF
40–66.6
range [MHz]
60–100
60–100
15–25
30–50
30–50
15–25
30–50
2000
1500
Min
200
200
f
f
f
f
f
REF
REF
REF
REF
REF
4
Ratio
f
f
f
REF
REF
REF
* 8
* 4
* 3
* 2
* 2
–0.3
–0.3
–0.3
Min
–65
QAx
f
QAX
60–100.0
120–200
120–200
120–200
120–200
60–100
15–25
30–50
V
CC
Typ
[MHz]
4.0
10
÷ 2
f
REF
f
f
f
f
f
f
f
f
f
f
REF
REF
REF
V
V
REF
REF
REF
REF
REF
REF
REF
Ratio
f
f
f
f
f
CC
CC
REF
REF
REF
REF
REF
Max
±20
±50
125
* 3 ÷ 2
3.6
+0.3
+0.3
÷ 2
÷ 2
÷ 2
* 8
* 4
* 4
* 2
* 3
* 2
* 2
Max
QBx
MPC9893
f
QBX
120–200
120–200
120–200
120–200
7.5–12.5
60–100
60–100
60–100
60–100
60–100
60–100
30–50
15–25
30–50
15–25
30–50
[MHz]
Unit
Unit
mA
mA
mA
pF
pF
°C
V
V
V
V
V
V
V
REV. 7 MARCH 3, 2008
Per output
Inputs
QFB
f
f
f
f
f
f
f
f
REF
REF
REF
REF
REF
REF
REF
REF
Condition
Condition
FB
16
16
8
6
8
4
8
4
(1)