sy89536l Micrel Semiconductor, sy89536l Datasheet
sy89536l
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sy89536l Summary of contents
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... Fanout buffer • Clock generator (divider) • Logic translation (LVPECL, HSTL) The SY89536L includes a flexible input design that accepts any reference input; single-ended LVTTL/CMOS, SSTL and differential LVPECL, LVDS, HSTL, and CML. This level of integration minimizes the additive jitter and ...
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... Tape and Reel. 3. Pb-Free package is recommended for new designs. 2 Precision Edge (1) Operating Package Range Marking Commercial SY89536LHC Commercial SY89536LHC Commercial SY89536LHZ with Pb-Free bar-line indicator Matte-Sn Commercial SY89536LHZ with Pb-Free bar-line indicator Matte- Electricals only. A ® SY89536L Lead Finish Sn-Pb Sn-Pb Pb-Free ...
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... Bank B Output Drivers: Differential HSTL outputs. See “Output Termination Recommendations” section. Output frequency is controlled by FSEL_B (0:2). Bank C 100k LVPECL Output Drivers: Output frequency is controlled by FSEL_C (0:2). Terminate outputs with –2V. See “Output Termination Recommendations” section Connect: Leave floating. 3 Precision Edge A and V C pins to 3.3V supply and V CCO ® SY89536L B CCO ...
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... Package Thermal Resistance (Junction-to-Case) TQFP Condition Note 4 Note 5 4 Precision Edge (Note 2) C .................................... 3.0V to +3.6V CCO ) ............................. + Still-Air .............................................. 23 C 200lfpm ............................................ 18 C 500lfpm ............................................ 15 C Still-Air .............................................. 44 C 200lfpm ............................................ 36 C 500lfpm ............................................ 30 C ......................................................... 4.0 C/W JC Min Typ 3.0 3.3 3.0 3.3 1.6 1.8 — 230 ® SY89536L Max Units 3.6 V 3.6 V 2.0 V 295 CCO ...
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... V –1.325 V –1.425 (Note +1.8V 10%) CCO Min Typ — 800 1.0 — 0.2 — ® Precision Edge SY89536L Max Units — V 0.8 V 150 A –300 A Max Units — +0 — V Max Units –0.895 V CC – ...
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... B = +1.8V 10% CCO Condition Note 9 Note 9 Note 9 Note 10 (Pk-to-Pk) Note 11 (rms) Note 12 Note 13 Note 13 HSTL_Out Note 14 Note 14 Note 14 Note 14 6 ® Precision Edge SY89536L Min Typ Max Units 14 — 160 MHz 33.33 — 500 MHz 600 — 1000 MHz — — — ...
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... SETUP_FSEL t OUTPUT_RESET t HOLD_FSEL Frequency Programming 001 010 t t OUTPUT_RESET SETUP_OUT_SYNC Frequency Programming (External VCO Clock) 001 010 f to VALID SEL OUTPUT TRANSITION TIME Output Frequency Updates to Valid Output 7 Precision Edge t OUTPUT_SYNC TIME t OUTPUT_SYNC TIME TIME ® SY89536L ...
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... Divider 10, 12 3-Bit Divider 10, 12 ® Precision Edge SY89536L QB0 50 49 /QB0 48 47 QB1 /QB1 46 QB2 45 /QB2 44 QB3 43 /QB3 42 QB4 41 /QB4 40 39 QB5 /QB5 38 QB6 37 /QB6 ...
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... Micrel, Inc. FUNCTIONAL DESCRIPTION At the core of the SY89536L clock synthesizer is a precision PLL driven by a differential or single-ended reference input. For users who wish to supply a crystal input, please use the SY89531L. The PLL output is sent to three banks of outputs. Each bank has its own programmable frequency divider, and the design is optimized to provide very low skew between banks, and very low jitter ...
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... REFCLK inputs. Depending on the actual worst case voltage seen, the minimum input voltage swing varies. to 800mV into PP PP –1.3V, typical. to 450mV into Precision Edge 990 REFCLK R1 825 /REFCLK R1 825 GND Figure 3. Simplified Input Structure ® SY89536L R2 990 ...
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... Note 1. Same dividers apply to FSEL_B (0:2) and FSEL_C (0:2). M9999-010808 hbwhelp@micrel.com or (408) 955-1690 Reference Input Frequency (1) (1) FSEL_A0 (LSB) 0 Output Disable Function, all outputs LOW HIGH Precision Edge SY89536L REFCLK 8 REFCLK 4 REFCLK 2 REFCLK 1 Output Divider VCO 2 VCO 4 VCO 6 VCO 8 VCO ...
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... FSEL MSEL (Post Divider) (Feedback Div Precision Edge SY89536L (1) VCO Frequency REFCLK PSEL 34 REFCLK PSEL 36 REFCLK PSEL 38 REFCLK PSEL 40 REFCLK PSEL 42 REFCLK PSEL 44 REFCLK PSEL 48 REFCLK PSEL 50 REFCLK PSEL 52 ...
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... Figure 4f. CML AC-Coupled (Short Trace Lengths) 13 Precision Edge CC(DRIVER) CC CC(DRIVER) REFCLK 102 CML 1% /REFCLK SY89536L Figure 4b. CML DC-Coupled CC(DRIVER) CC CC(DRIVER) REFCLK PECL /REFCLK SY89536L —2V CC Figure 4d. 3.3V LVPECL DC-Coupled REFCLK 102 1% /REFCLK 3.92k 3.92k 1% 1% ® SY89536L V CC SY89536L ...
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... Micrel, Inc CC(DRIVER CML 130 130 1% 1% Figure 4g. CML AC-Coupled (Long Trace Lengths) M9999-010808 hbwhelp@micrel.com or (408) 955-1690 V CC REFCLK /REFCLK SY89536L 14 Precision Edge SY89536L V CC REFCLK 100 LVDS 1% /REFCLK SY89536L Figure 4h. LVDS ® ...
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... +3. +3. Source Figure 7. HSTL Differential Termination . For +3.3V systems Precision Edge R1 130 +3.3V R2 “Destination” – (Note 1) +3.3V “Destination” C1 (optional) 0.01 F (Notes +3.3V Destination (Note 1) ® SY89536L ...
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... PCB Thermal Consideration for 64-Pin EPAD-TQFP Package + 1 (408) 474-1000 FAX Micrel for any damages resulting from such use or sale. © 2005 Micrel, Incorporated. 16 +0.15 –0.15 +0.006 –0.006 Rev. 02 Package EP- Exposed Pad Die http://www.micrel.com WEB ® Precision Edge SY89536L ...