sy89536l Micrel Semiconductor, sy89536l Datasheet - Page 10

• Manufacturer Part Number: sy89536l
• Description: Sy89536l 3.3v, Precision, 33mhz To 500mhz Programmable Lvpecl And Hstl Bus Clock Synthesizer
• Manufacturer: Micrel Semiconductor

Micrel, Inc.
Output Logic Characteristics
illustrations. In cases where single-ended output is desired,
the designer should terminate the unused complimentary
output in the same manner as the normal output that is
being used. Unused output pairs can be left floating.
LVPECL operation:
HSTL operation (Bank B):
M9999-010808
[e-mail] or [phone]
See “Output Termination Recommendations” for
• Typical voltage swing is 700mV
• Common mode voltage is V
• 100 termination across the output pair is NOT
• Typical voltage swing is 250mV
50 .
recommended for LVPECL. See “Output Termination”
section, Figures 5 to 7.
effective 50 .
*For V
use ferrite bead = 200mA, 0.45 DC,
Murata P/N BLM21A1025
*For V
Murata, P/N BLM31P005
*Component size: 0805
Figure 2. Power Supply Filtering
Power Supply
CC_
CCO
side
22 F
Analog,V
A,B,C use ferrite bead = 3A, 0.025 DC,
Ferrite Bead*
CC_TTL,
V
CC1,
1 F
CC
–1.3V, typical.
PP
PP
to 800mV
to 450mV
0.01 F
Device
side
Pins
V
CC
PP
PP
into
into
10
Thermal Considerations
dissipation. We strongly recommend soldering the exposed
die pad to a ground plane. Where this is not possible, we
recommend maintaining at least 500lfpm air flow around
the part.
and implementation details, see Amkor Technology’s web
site, www.amkor.com.
REFCLK Input Interface
differential or single-ended input signal within 300mV above
V
the true or complement inputs to ground, but not both. A
logic zero is achieved by connecting the complement input
to ground with the true input floating. For a TTL input, tie a
resistor between the complement input and ground. See
“Input Interface” section, Figures 4a through 4h.
Input Levels
connected directly to the REFCLK inputs. Depending on
the actual worst case voltage seen, the minimum input
voltage swing varies.
CC
This part has an exposed die pad for enhanced heat
For additional information on exposed-pad characteristics
The flexible REFCLK inputs are designed to accept any
Do not leave unused REFCLK inputs floating. Tie either
LVDS, CML and HSTL differential signals may be
and 300mV below ground.
/REFCLK
REFCLK
Figure 3. Simplified Input Structure
825
825
R1
R1
990
R2
GND
V
CC
Precision Edge
R2
990
SY89536L
®