sy89218u Micrel Semiconductor, sy89218u Datasheet - Page 5

• Manufacturer Part Number: sy89218u
• Description: Precision 1 15 Lvds Fanout Buffer With 2 1 Mux And Four ?1/?2/?4 Clock Divider Output Banks
• Manufacturer: Micrel Semiconductor

Micrel, Inc.
Pin Description
Function Table
Notes:
1.
2.
3.
4.
January 2007
19, 32, 49, 63
Pin Number
/MR
/MR asynchronously forces Q to LOW (/Q to HIGH).
EN forces Q LOW between 2 and 6 input clock cycles after the falling edge of EN. Refer to “Timing Diagram” section.
EN synchronously enables Q between two and six input clock cycles after the rising edge of EN. Refer to “Timing Diagram” section.
FSEL valid for each of the banks A, B, C, and D. Banks can be programmed independent of each other.
1
1
1
1
1
1
1
0
(1)
64
EN
X
1
1
1
1
1
1
0
(2, 3)
Exposed Pad
(continued)
Pin Name
GND,
CLK_SEL
EN
X
X
0
1
0
1
0
1
Pin Function
Single-Ended Input: This TTL/CMOS input disables and enables the outputs. It is
internally connected to a 25k pull-up resistor and will default to logic HIGH state if left
open. When disabled, true outputs go LOW and complementary outputs switch to HIGH.
The input switching threshold is V
description, refer to Figures 2d and 2e.
Ground and exposed pad must be connected to the same GND plane on the board.
FSELx0
X
X
X
X
0
0
1
1
(4)
FSELx1
X
X
0
0
0
0
1
1
5
(4)
CC
/2. For the input enable and disable functional
IN0÷1
IN1÷1
IN0÷2
IN1÷2
IN0÷4
IN1÷4
Q
0
0
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SY89218U