lmx2515 National Semiconductor Corporation, lmx2515 Datasheet - Page 13
lmx2515
Manufacturer Part Number
lmx2515
Description
Pllatinum? Frequency Synthesizer System With Integrated Vco
Manufacturer
National Semiconductor Corporation
Datasheet
1.LMX2515.pdf
(17 pages)
Programming Description
R0 REGISTER
The R0 register address bits (R0 [1:0]) are “00”.
The Rx/Tx bit selects between receive and transmit modes and, in conjunction with the RF VCO selection bit (RF_SEL), the
channel spacing to be synthesized.
The RF_PD bit selects the power down mode of the RF PLL and selected VCO.
The HS bit selects between normal and high speed locking mode.
The RF_SEL bit is set to "0" for the LMX2515LQ0701 and "1" for the LMX2515LQ1321.
The RF N counter consists of the 4-bit programmable counter (RF_B counter), the 3-bit swallow counter (RF_A counter) and the
10-bit delta sigma modulator (RF_FN counter). The equations for calculating the counter values are presented below.
R0
(Default)
Counter Name
Modulus Counter
Programmable Counter
Swallow Counter
MSB
23
RX/
TX
Name
RX/TX
RF_PD
HS
RF_SEL
RF_B [3:0]
RF_A [2:0]
RF_FN [9:0]
22
RF_
PD
21
HS 0
20 19
RF_
SEL
Symbol
RF_FN
RF_B
RF_A
18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
(Continued)
RF_B
[3:0]
SHIFT REGISTER BIT LOCATION
R0 REGISTER
Data Field
13
Functions
RX/TX Mode
0 = Rx
1 = Tx
Power Down of RF Synthesizer
0 = RF synthesizer on (Active mode)
1 = RF synthesizer powered down
Locking Mode
0 = Normal Mode
1 = High Speed Mode
RF VCO Selection
0 = LMX2515LQ0701
1 = LMX2515LQ1321
RF_B Counter
4-bit programmable counter
0 ≤ RF_B ≤ 15 for both bands
RF_A Counter
3-bit swallow counter
0 ≤ RF_A ≤ 7 for LMX2515LQ1321
0 ≤ RF_A ≤ 3 for LMX2515LQ0701
RF_FN Counter
10-bit modulus counter
0 ≤ RF_FN
Functions
RF N Divider
N = 8 x RF_B + RF_A + RF_FN/FD (LMX2515LQ1321)
N = 4 x RF_B + RF_A + RF_FN/FD (LMX2515LQ0701)
RF_A
[2:0]
<
FD See Table 6 for FD values.
RF_FN
[9:0]
Address
Field
0
www.national.com
LSB
0
0