vsc8169 Vitesse Semiconductor Corp, vsc8169 Datasheet - Page 13

• Manufacturer Part Number: vsc8169
• Description: Oc-48 Fec 16 1 Sonet/sdh Mux With Clock Generator
• Manufacturer: Vitesse Semiconductor Corp

G52230-0, Rev 3.6
01/02/01
Preliminary Data Sheet
VSC8169
Pin #
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
REF_FREQSEL
FIFO_WARN
CLK16O+
CLK16O-
RESET
CLKI+
Name
CLKI-
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VEE
VEE
VEE
VEE
D0+
D1+
D2+
D0-
D1-
D2-
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
© VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012
Tel: (800) VITESSE • FAX: [phone] • Email: [e-mail]
I/O
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
O
O
O
I
I
I
I
I
I
I
I
I
I
VITESSE
SEMICONDUCTOR CORPORATION
LVPECL
LVPECL
LVPECL
LVPECL
LVPECL
LVPECL
LVPECL
LVPECL
LVPECL
LVPECL
Level
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
GND
GND
GND
GND
TTL
TTL
TTL
—
—
—
—
—
—
—
—
—
—
Internet: www.vitesse.com
No connect, leave unconnected
No connect, leave unconnected
No connect, leave unconnected
Reference clock input select
Positive power supply
Negative power supply
FIFO overflow warning
Negative power supply
Positive power supply
Reset to align FIFO Write and Read pointers
No connect, leave unconnected
No connect, leave unconnected
No connect, leave unconnected
No connect, leave unconnected
No connect, leave unconnected
Positive power supply
Negative power supply
Low-speed clock output, true. A divide-by-16 version of the PLL clock.
Low-speed clock output, complement. A divide-by-16 version of the
PLL clock.
Positive power supply
Low-speed clock input for latching low-speed data, true
Low-speed clock input for latching low-speed data, complement
Negative power supply
Low-speed differential parallel data
Low-speed differential parallel data
Positive power supply
Low-speed differential parallel data
Low-speed differential parallel data
No connect, leave unconnected
Positive power supply
No connect, leave unconnected
Positive power supply
Low-speed differential parallel data
Low-speed differential parallel data
Description
OC-48 (FEC) 16:1 SONET/SDH
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
MUX with Clock Generator
Page 13