pca2125 NXP Semiconductors, pca2125 Datasheet - Page 20

• Manufacturer Part Number: pca2125
• Description: Spi Real Time Clock / Calendar Semiconductors
• Manufacturer: NXP Semiconductors

NXP Semiconductors
PCA2125_00
Preliminary data sheet
Fig 12. Interrupt scheme
When SI, MI, TIE and AIE are all disabled, INT will remain high impedance.
COUNTDOWN COUNTER
SECONDS COUNTER
MINUTES COUNTER
6.7.1 Minute/Second interrupts
6.7 Interrupt output, INT
TE
An active low interrupt signal is available at pin INT. Operation is controlled via the bits of
control register 2. Interrupts may be sourced from three places; Second/minute timer,
countdown timer or alarm function.
With the TI/TP bit, the timer generated interrupts can be configured to either generate a
pulse or to follow the status of the interrupt flags; TF and MSF.
Remark: Note that the interrupts from the three groups are wire-OR’d, meaning they will
mask one another (see
The pulse generator for the minute/second interrupt operates from an internal 64 Hz clock
and consequently generates a pulse of
If the MSF flag is clear before the end of the INT pulse, then the INT pulse is shortened.
This allows the source of a system interrupt to be cleared immediately it is serviced i.e. the
system does not have to wait for the completion of the pulse before continuing; see
Figure
from interface:
from interface:
from interface:
13. Instructions for clearing MSF can be found in
clear MSF
set alarm
clear AF
clear TF
flag, AF
MI
SI
SET
SET
SET
SECOND FLAG
Rev. 00.11 — 30 January 2007
MSF: MINUTE
AF: ALARM
TF: TIMER
CLEAR
CLEAR
CLEAR
Figure
FLAG
12).
TRIGGER
TRIGGER
GENERATOR 1
GENERATOR 2
PULSE
CLEAR
PULSE
CLEAR
1
to interface:
read MSF
to interface:
read TF
to interface:
read AF
⁄
64
seconds in duration.
TI/TP
0
1
0
1
Section
SPI Real time clock / calendar
SI
TIE
AIE
6.6.3.
MI
PCA2125
© NXP B.V. 2007. All rights reserved.
001aaf907
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